From 8a2278b7fb3df67cd415c679ba1a0e5e4a1761a7 Mon Sep 17 00:00:00 2001 From: Nicolin Chen Date: Sun, 8 Apr 2018 17:33:54 -0700 Subject: ASoC: fsl_esai: Add freq check in set_dai_sysclk() The freq parameter indicates the physical frequency of an actual input clock or a desired frequency of an output clock for HCKT/R. It should never be passed 0. This might cause Division-by-zero. So this patch adds a check to fix it. Signed-off-by: Nicolin Chen Reviewed-by: Fabio Estevam Signed-off-by: Mark Brown --- sound/soc/fsl/fsl_esai.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'sound/soc') diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c index da8fd98c7f51..d79e99ef31ad 100644 --- a/sound/soc/fsl/fsl_esai.c +++ b/sound/soc/fsl/fsl_esai.c @@ -226,6 +226,12 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned long clk_rate; int ret; + if (freq == 0) { + dev_err(dai->dev, "%sput freq of HCK%c should not be 0Hz\n", + in ? "in" : "out", tx ? 'T' : 'R'); + return -EINVAL; + } + /* Bypass divider settings if the requirement doesn't change */ if (freq == esai_priv->hck_rate[tx] && dir == esai_priv->hck_dir[tx]) return 0; -- cgit v1.2.3-55-g7522