// SPDX-License-Identifier: ISC /* Copyright (C) 2019 MediaTek Inc. * * Author: Ryder Lee * Roy Luo * Felix Fietkau * Lorenzo Bianconi */ #include #include #include "mt7615.h" #include "../dma.h" #include "mac.h" static inline s8 to_rssi(u32 field, u32 rxv) { return (FIELD_GET(field, rxv) - 220) / 2; } static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev, u8 idx, bool unicast) { struct mt7615_sta *sta; struct mt76_wcid *wcid; if (idx >= ARRAY_SIZE(dev->mt76.wcid)) return NULL; wcid = rcu_dereference(dev->mt76.wcid[idx]); if (unicast || !wcid) return wcid; if (!wcid->sta) return NULL; sta = container_of(wcid, struct mt7615_sta, wcid); if (!sta->vif) return NULL; return &sta->vif->sta.wcid; } int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) { struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; struct ieee80211_supported_band *sband; struct ieee80211_hdr *hdr; __le32 *rxd = (__le32 *)skb->data; u32 rxd0 = le32_to_cpu(rxd[0]); u32 rxd1 = le32_to_cpu(rxd[1]); u32 rxd2 = le32_to_cpu(rxd[2]); bool unicast, remove_pad, insert_ccmp_hdr = false; int i, idx; if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state)) return -EINVAL; memset(status, 0, sizeof(*status)); unicast = (rxd1 & MT_RXD1_NORMAL_ADDR_TYPE) == MT_RXD1_NORMAL_U2M; idx = FIELD_GET(MT_RXD2_NORMAL_WLAN_IDX, rxd2); status->wcid = mt7615_rx_get_wcid(dev, idx, unicast); /* TODO: properly support DBDC */ status->freq = dev->mt76.chandef.chan->center_freq; status->band = dev->mt76.chandef.chan->band; if (status->band == NL80211_BAND_5GHZ) sband = &dev->mt76.sband_5g.sband; else sband = &dev->mt76.sband_2g.sband; if (rxd2 & MT_RXD2_NORMAL_FCS_ERR) status->flag |= RX_FLAG_FAILED_FCS_CRC; if (rxd2 & MT_RXD2_NORMAL_TKIP_MIC_ERR) status->flag |= RX_FLAG_MMIC_ERROR; if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 && !(rxd2 & (MT_RXD2_NORMAL_CLM | MT_RXD2_NORMAL_CM))) { status->flag |= RX_FLAG_DECRYPTED; status->flag |= RX_FLAG_IV_STRIPPED; status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED; } remove_pad = rxd1 & MT_RXD1_NORMAL_HDR_OFFSET; if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR) return -EINVAL; if (!sband->channels) return -EINVAL; rxd += 4; if (rxd0 & MT_RXD0_NORMAL_GROUP_4) { rxd += 4; if ((u8 *)rxd - skb->data >= skb->len) return -EINVAL; } if (rxd0 & MT_RXD0_NORMAL_GROUP_1) { u8 *data = (u8 *)rxd; if (status->flag & RX_FLAG_DECRYPTED) { status->iv[0] = data[5]; status->iv[1] = data[4]; status->iv[2] = data[3]; status->iv[3] = data[2]; status->iv[4] = data[1]; status->iv[5] = data[0]; insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); } rxd += 4; if ((u8 *)rxd - skb->data >= skb->len) return -EINVAL; } if (rxd0 & MT_RXD0_NORMAL_GROUP_2) { rxd += 2; if ((u8 *)rxd - skb->data >= skb->len) return -EINVAL; } if (rxd0 & MT_RXD0_NORMAL_GROUP_3) { u32 rxdg0 = le32_to_cpu(rxd[0]); u32 rxdg1 = le32_to_cpu(rxd[1]); u32 rxdg3 = le32_to_cpu(rxd[3]); u8 stbc = FIELD_GET(MT_RXV1_HT_STBC, rxdg0); bool cck = false; i = FIELD_GET(MT_RXV1_TX_RATE, rxdg0); switch (FIELD_GET(MT_RXV1_TX_MODE, rxdg0)) { case MT_PHY_TYPE_CCK: cck = true; /* fall through */ case MT_PHY_TYPE_OFDM: i = mt76_get_rate(&dev->mt76, sband, i, cck); break; case MT_PHY_TYPE_HT_GF: case MT_PHY_TYPE_HT: status->encoding = RX_ENC_HT; if (i > 31) return -EINVAL; break; case MT_PHY_TYPE_VHT: status->nss = FIELD_GET(MT_RXV2_NSTS, rxdg1) + 1; status->encoding = RX_ENC_VHT; break; default: return -EINVAL; } status->rate_idx = i; switch (FIELD_GET(MT_RXV1_FRAME_MODE, rxdg0)) { case MT_PHY_BW_20: break; case MT_PHY_BW_40: status->bw = RATE_INFO_BW_40; break; case MT_PHY_BW_80: status->bw = RATE_INFO_BW_80; break; case MT_PHY_BW_160: status->bw = RATE_INFO_BW_160; break; default: return -EINVAL; } if (rxdg0 & MT_RXV1_HT_SHORT_GI) status->enc_flags |= RX_ENC_FLAG_SHORT_GI; if (rxdg0 & MT_RXV1_HT_AD_CODE) status->enc_flags |= RX_ENC_FLAG_LDPC; status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; status->chains = dev->mt76.antenna_mask; status->chain_signal[0] = to_rssi(MT_RXV4_RCPI0, rxdg3); status->chain_signal[1] = to_rssi(MT_RXV4_RCPI1, rxdg3); status->chain_signal[2] = to_rssi(MT_RXV4_RCPI2, rxdg3); status->chain_signal[3] = to_rssi(MT_RXV4_RCPI3, rxdg3); status->signal = status->chain_signal[0]; for (i = 1; i < hweight8(dev->mt76.antenna_mask); i++) { if (!(status->chains & BIT(i))) continue; status->signal = max(status->signal, status->chain_signal[i]); } rxd += 6; if ((u8 *)rxd - skb->data >= skb->len) return -EINVAL; } skb_pull(skb, (u8 *)rxd - skb->data + 2 * remove_pad); if (insert_ccmp_hdr) { u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1); mt76_insert_ccmp_hdr(skb, key_id); } hdr = (struct ieee80211_hdr *)skb->data; if (!status->wcid || !ieee80211_is_data_qos(hdr->frame_control)) return 0; status->aggr = unicast && !ieee80211_is_qos_nullfunc(hdr->frame_control); status->tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK; status->seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); return 0; } void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) { } void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, struct mt76_queue_entry *e) { if (!e->txwi) { dev_kfree_skb_any(e->skb); return; } /* error path */ if (e->skb == DMA_DUMMY_DATA) { struct mt76_txwi_cache *t; struct mt7615_dev *dev; struct mt7615_txp *txp; u8 *txwi_ptr; txwi_ptr = mt76_get_txwi_ptr(mdev, e->txwi); txp = (struct mt7615_txp *)(txwi_ptr + MT_TXD_SIZE); dev = container_of(mdev, struct mt7615_dev, mt76); spin_lock_bh(&dev->token_lock); t = idr_remove(&dev->token, le16_to_cpu(txp->token)); spin_unlock_bh(&dev->token_lock); e->skb = t ? t->skb : NULL; } if (e->skb) mt76_tx_complete_skb(mdev, e->skb); } u16 mt7615_mac_tx_rate_val(struct mt7615_dev *dev, const struct ieee80211_tx_rate *rate, bool stbc, u8 *bw) { u8 phy, nss, rate_idx; u16 rateval; *bw = 0; if (rate->flags & IEEE80211_TX_RC_VHT_MCS) { rate_idx = ieee80211_rate_get_vht_mcs(rate); nss = ieee80211_rate_get_vht_nss(rate); phy = MT_PHY_TYPE_VHT; if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) *bw = 1; else if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH) *bw = 2; else if (rate->flags & IEEE80211_TX_RC_160_MHZ_WIDTH) *bw = 3; } else if (rate->flags & IEEE80211_TX_RC_MCS) { rate_idx = rate->idx; nss = 1 + (rate->idx >> 3); phy = MT_PHY_TYPE_HT; if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD) phy = MT_PHY_TYPE_HT_GF; if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) *bw = 1; } else { const struct ieee80211_rate *r; int band = dev->mt76.chandef.chan->band; u16 val; nss = 1; r = &mt76_hw(dev)->wiphy->bands[band]->bitrates[rate->idx]; if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) val = r->hw_value_short; else val = r->hw_value; phy = val >> 8; rate_idx = val & 0xff; } rateval = (FIELD_PREP(MT_TX_RATE_IDX, rate_idx) | FIELD_PREP(MT_TX_RATE_MODE, phy) | FIELD_PREP(MT_TX_RATE_NSS, nss - 1)); if (stbc && nss == 1) rateval |= MT_TX_RATE_STBC; return rateval; } int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, struct sk_buff *skb, struct mt76_wcid *wcid, struct ieee80211_sta *sta, int pid, struct ieee80211_key_conf *key) { struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); struct ieee80211_tx_rate *rate = &info->control.rates[0]; struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; struct ieee80211_vif *vif = info->control.vif; int tx_count = 8; u8 fc_type, fc_stype, p_fmt, q_idx, omac_idx = 0; __le16 fc = hdr->frame_control; u16 seqno = 0; u32 val; if (vif) { struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; omac_idx = mvif->omac_idx; } if (sta) { struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; tx_count = msta->rate_count; } fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; if (ieee80211_is_data(fc)) { q_idx = skb_get_queue_mapping(skb); p_fmt = MT_TX_TYPE_CT; } else if (ieee80211_is_beacon(fc)) { q_idx = MT_LMAC_BCN0; p_fmt = MT_TX_TYPE_FW; } else { q_idx = MT_LMAC_ALTX0; p_fmt = MT_TX_TYPE_CT; } val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + MT_TXD_SIZE) | FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_LMAC) | FIELD_PREP(MT_TXD0_Q_IDX, q_idx); txwi[0] = cpu_to_le32(val); val = MT_TXD1_LONG_FORMAT | FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | FIELD_PREP(MT_TXD1_HDR_INFO, ieee80211_get_hdrlen_from_skb(skb) / 2) | FIELD_PREP(MT_TXD1_TID, skb->priority & IEEE80211_QOS_CTL_TID_MASK) | FIELD_PREP(MT_TXD1_PKT_FMT, p_fmt) | FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); txwi[1] = cpu_to_le32(val); val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) | FIELD_PREP(MT_TXD2_MULTICAST, is_multicast_ether_addr(hdr->addr1)); txwi[2] = cpu_to_le32(val); if (!(info->flags & IEEE80211_TX_CTL_AMPDU)) txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE); txwi[4] = 0; txwi[6] = 0; if (rate->idx >= 0 && rate->count && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) { bool stbc = info->flags & IEEE80211_TX_CTL_STBC; u8 bw; u16 rateval = mt7615_mac_tx_rate_val(dev, rate, stbc, &bw); txwi[2] |= cpu_to_le32(MT_TXD2_FIX_RATE); val = MT_TXD6_FIXED_BW | FIELD_PREP(MT_TXD6_BW, bw) | FIELD_PREP(MT_TXD6_TX_RATE, rateval); txwi[6] |= cpu_to_le32(val); if (rate->flags & IEEE80211_TX_RC_SHORT_GI) txwi[6] |= cpu_to_le32(MT_TXD6_SGI); if (info->flags & IEEE80211_TX_CTL_LDPC) txwi[6] |= cpu_to_le32(MT_TXD6_LDPC); if (!(rate->flags & (IEEE80211_TX_RC_MCS | IEEE80211_TX_RC_VHT_MCS))) txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE); tx_count = rate->count; } if (!ieee80211_is_beacon(fc)) { val = MT_TXD5_TX_STATUS_HOST | MT_TXD5_SW_POWER_MGMT | FIELD_PREP(MT_TXD5_PID, pid); txwi[5] = cpu_to_le32(val); } else { txwi[5] = 0; /* use maximum tx count for beacons */ tx_count = 0x1f; } val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count); if (ieee80211_is_data_qos(hdr->frame_control)) { seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); val |= MT_TXD3_SN_VALID; } else if (ieee80211_is_back_req(hdr->frame_control)) { struct ieee80211_bar *bar = (struct ieee80211_bar *)skb->data; seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(bar->start_seq_num)); val |= MT_TXD3_SN_VALID; } val |= FIELD_PREP(MT_TXD3_SEQ, seqno); txwi[3] = cpu_to_le32(val); if (info->flags & IEEE80211_TX_CTL_NO_ACK) txwi[3] |= cpu_to_le32(MT_TXD3_NO_ACK); if (key) txwi[3] |= cpu_to_le32(MT_TXD3_PROTECT_FRAME); txwi[7] = FIELD_PREP(MT_TXD7_TYPE, fc_type) | FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); return 0; } void mt7615_txp_skb_unmap(struct mt76_dev *dev, struct mt76_txwi_cache *t) { struct mt7615_txp *txp; u8 *txwi; int i; txwi = mt76_get_txwi_ptr(dev, t); txp = (struct mt7615_txp *)(txwi + MT_TXD_SIZE); for (i = 1; i < txp->nbuf; i++) dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]), le16_to_cpu(txp->len[i]), DMA_TO_DEVICE); } int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, enum mt76_txq_id qid, struct mt76_wcid *wcid, struct ieee80211_sta *sta, struct mt76_tx_info *tx_info) { struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data; struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); struct mt7615_sta *msta = container_of(wcid, struct mt7615_sta, wcid); struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); struct ieee80211_key_conf *key = info->control.hw_key; struct ieee80211_vif *vif = info->control.vif; int i, pid, id, nbuf = tx_info->nbuf - 1; u8 *txwi = (u8 *)txwi_ptr; struct mt76_txwi_cache *t; struct mt7615_txp *txp; if (!wcid) wcid = &dev->mt76.global_wcid; pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb); if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) { spin_lock_bh(&dev->mt76.lock); msta->rate_probe = true; mt7615_mcu_set_rates(dev, msta, &info->control.rates[0], msta->rates); spin_unlock_bh(&dev->mt76.lock); } mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta, pid, key); txp = (struct mt7615_txp *)(txwi + MT_TXD_SIZE); for (i = 0; i < nbuf; i++) { txp->buf[i] = cpu_to_le32(tx_info->buf[i + 1].addr); txp->len[i] = cpu_to_le16(tx_info->buf[i + 1].len); } txp->nbuf = nbuf; /* pass partial skb header to fw */ tx_info->buf[1].len = MT_CT_PARSE_LEN; tx_info->nbuf = MT_CT_DMA_BUF_NUM; txp->flags = cpu_to_le16(MT_CT_INFO_APPLY_TXD); if (!key) txp->flags |= cpu_to_le16(MT_CT_INFO_NONE_CIPHER_FRAME); if (ieee80211_is_mgmt(hdr->frame_control)) txp->flags |= cpu_to_le16(MT_CT_INFO_MGMT_FRAME); if (vif) { struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; txp->bss_idx = mvif->idx; } t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); t->skb = tx_info->skb; spin_lock_bh(&dev->token_lock); id = idr_alloc(&dev->token, t, 0, MT7615_TOKEN_SIZE, GFP_ATOMIC); spin_unlock_bh(&dev->token_lock); if (id < 0) return id; txp->token = cpu_to_le16(id); txp->rept_wds_wcid = 0xff; tx_info->skb = DMA_DUMMY_DATA; return 0; } static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, struct ieee80211_tx_info *info, __le32 *txs_data) { struct ieee80211_supported_band *sband; int i, idx, count, final_idx = 0; bool fixed_rate, ack_timeout; bool probe, ampdu, cck = false; u32 final_rate, final_rate_flags, final_nss, txs; fixed_rate = info->status.rates[0].count; probe = !!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE); txs = le32_to_cpu(txs_data[1]); ampdu = !fixed_rate && (txs & MT_TXS1_AMPDU); txs = le32_to_cpu(txs_data[3]); count = FIELD_GET(MT_TXS3_TX_COUNT, txs); txs = le32_to_cpu(txs_data[0]); final_rate = FIELD_GET(MT_TXS0_TX_RATE, txs); ack_timeout = txs & MT_TXS0_ACK_TIMEOUT; if (!ampdu && (txs & MT_TXS0_RTS_TIMEOUT)) return false; if (txs & MT_TXS0_QUEUE_TIMEOUT) return false; if (!ack_timeout) info->flags |= IEEE80211_TX_STAT_ACK; info->status.ampdu_len = 1; info->status.ampdu_ack_len = !!(info->flags & IEEE80211_TX_STAT_ACK); if (ampdu || (info->flags & IEEE80211_TX_CTL_AMPDU)) info->flags |= IEEE80211_TX_STAT_AMPDU | IEEE80211_TX_CTL_AMPDU; if (fixed_rate && !probe) { info->status.rates[0].count = count; goto out; } for (i = 0, idx = 0; i < ARRAY_SIZE(info->status.rates); i++) { int cur_count = min_t(int, count, 2 * MT7615_RATE_RETRY); if (!i && probe) { cur_count = 1; } else { info->status.rates[i] = sta->rates[idx]; idx++; } if (i && info->status.rates[i].idx < 0) { info->status.rates[i - 1].count += count; break; } if (!count) { info->status.rates[i].idx = -1; break; } info->status.rates[i].count = cur_count; final_idx = i; count -= cur_count; } out: final_rate_flags = info->status.rates[final_idx].flags; switch (FIELD_GET(MT_TX_RATE_MODE, final_rate)) { case MT_PHY_TYPE_CCK: cck = true; /* fall through */ case MT_PHY_TYPE_OFDM: if (dev->mt76.chandef.chan->band == NL80211_BAND_5GHZ) sband = &dev->mt76.sband_5g.sband; else sband = &dev->mt76.sband_2g.sband; final_rate &= MT_TX_RATE_IDX; final_rate = mt76_get_rate(&dev->mt76, sband, final_rate, cck); final_rate_flags = 0; break; case MT_PHY_TYPE_HT_GF: case MT_PHY_TYPE_HT: final_rate_flags |= IEEE80211_TX_RC_MCS; final_rate &= MT_TX_RATE_IDX; if (final_rate > 31) return false; break; case MT_PHY_TYPE_VHT: final_nss = FIELD_GET(MT_TX_RATE_NSS, final_rate); final_rate_flags |= IEEE80211_TX_RC_VHT_MCS; final_rate = (final_rate & MT_TX_RATE_IDX) | (final_nss << 4); break; default: return false; } info->status.rates[final_idx].idx = final_rate; info->status.rates[final_idx].flags = final_rate_flags; return true; } static bool mt7615_mac_add_txs_skb(struct mt7615_dev *dev, struct mt7615_sta *sta, int pid, __le32 *txs_data) { struct mt76_dev *mdev = &dev->mt76; struct sk_buff_head list; struct sk_buff *skb; if (pid < MT_PACKET_ID_FIRST) return false; mt76_tx_status_lock(mdev, &list); skb = mt76_tx_status_skb_get(mdev, &sta->wcid, pid, &list); if (skb) { struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) { spin_lock_bh(&dev->mt76.lock); if (sta->rate_probe) { mt7615_mcu_set_rates(dev, sta, NULL, sta->rates); sta->rate_probe = false; } spin_unlock_bh(&dev->mt76.lock); } if (!mt7615_fill_txs(dev, sta, info, txs_data)) { ieee80211_tx_info_clear_status(info); info->status.rates[0].idx = -1; } mt76_tx_status_skb_done(mdev, skb, &list); } mt76_tx_status_unlock(mdev, &list); return !!skb; } void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data) { struct ieee80211_tx_info info = {}; struct ieee80211_sta *sta = NULL; struct mt7615_sta *msta = NULL; struct mt76_wcid *wcid; __le32 *txs_data = data; u32 txs; u8 wcidx; u8 pid; txs = le32_to_cpu(txs_data[0]); pid = FIELD_GET(MT_TXS0_PID, txs); txs = le32_to_cpu(txs_data[2]); wcidx = FIELD_GET(MT_TXS2_WCID, txs); if (pid == MT_PACKET_ID_NO_ACK) return; if (wcidx >= ARRAY_SIZE(dev->mt76.wcid)) return; rcu_read_lock(); wcid = rcu_dereference(dev->mt76.wcid[wcidx]); if (!wcid) goto out; msta = container_of(wcid, struct mt7615_sta, wcid); sta = wcid_to_sta(wcid); if (mt7615_mac_add_txs_skb(dev, msta, pid, txs_data)) goto out; if (wcidx >= MT7615_WTBL_STA || !sta) goto out; if (mt7615_fill_txs(dev, msta, &info, txs_data)) ieee80211_tx_status_noskb(mt76_hw(dev), sta, &info); out: rcu_read_unlock(); } void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb) { struct mt7615_tx_free *free = (struct mt7615_tx_free *)skb->data; struct mt76_dev *mdev = &dev->mt76; struct mt76_txwi_cache *txwi; u8 i, count; count = FIELD_GET(MT_TX_FREE_MSDU_ID_CNT, le16_to_cpu(free->ctrl)); for (i = 0; i < count; i++) { spin_lock_bh(&dev->token_lock); txwi = idr_remove(&dev->token, le16_to_cpu(free->token[i])); spin_unlock_bh(&dev->token_lock); if (!txwi) continue; mt7615_txp_skb_unmap(mdev, txwi); if (txwi->skb) { mt76_tx_complete_skb(mdev, txwi->skb); txwi->skb = NULL; } mt76_put_txwi(mdev, txwi); } dev_kfree_skb(skb); } void mt7615_mac_work(struct work_struct *work) { struct mt7615_dev *dev; dev = (struct mt7615_dev *)container_of(work, struct mt76_dev, mac_work.work); mt76_tx_status_check(&dev->mt76, NULL, false); ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work, MT7615_WATCHDOG_TIME); }