/include/scsi/

s='column1'>| | The -M option adds an 18-column item, and the header needs to be wide enough to keep the header aligned with the columns. Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: fix SKX PKG_CSTATE_LIMIT decodingLen Brown2016-12-021-1/+4 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SKX has fewer package C-states than previous generations, and so the decoding of PKG_CSTATE_LIMIT has changed. This changes the line ending with pkg-cstate-limit=XXX: pcYYY Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: Support Knights Mill (KNM)Len Brown2016-12-011-0/+7 | | | | | | | | | | | | | | | | | | | | Original-author: Piotr Luc <piotr.luc@intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: Display HWP OOB statusSrinivas Pandruvada2016-12-011-2/+3 | | | | | | | | | | | | | | | | | | | | | | | | | | | | Display if the HWP is enabled in OOB (Out of band) mode. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: fix Denverton BCLKXiaolong Wang2016-12-011-0/+1 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Denverton to the group of SandyBridge and later processors, to let the bclk be recognized as 100MHz rather than 133MHz, then avoid the wrong value of the frequencies based on it, including Bzy_MHz, max efficiency freuency, base frequency, and turbo mode frequencies. Signed-off-by: Xiaolong Wang <xiaolong.wang@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: use intel-family.h model stringsLen Brown2016-12-012-124/+126 | | | | | | | | | | | | | | | | | | | | | | | | | | | | All except for model 1F, a Nehalem, which is currently incorrectly indentified as a Westmere in that new header. Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power/turbostat: Add Denverton RAPL supportJacob Pan2016-12-011-0/+3 | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Denverton CPU RAPL supports package, core, and DRAM domains. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power/turbostat: Add Denverton supportJacob Pan2016-12-011-0/+2 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Denverton is an Atom based micro server which shares the same Goldmont architecture as Broxton. The available C-states on Denverton is a subset of Broxton with only C1, C1e, and C6. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power/turbostat: split core MSR support into status + limitJacob Pan2016-12-011-9/+11 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPUs may not have PP0/Core domain power limit MSRs. We should still allow its domain energy status to be used. This patch splits PP0/Core RAPL into two separate flags for power limit and energy status such that energy status can continue to be reported without power limit. Without this patch, turbostat will not be able to use the remaining RAPL features if some PL MSRs are not present. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: fix error case overflow read of slm_freq_table[]Colin Ian King2016-12-011-1/+1 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When i >= SLM_BCLK_FREQS, the frequency read from the slm_freq_table is off the end of the array because msr is set to 3 rather than the actual array index i. Set i to 3 rather than msr to fix this. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: Allocate correct amount of fd and irq entriesMika Westerberg2016-12-011-4/+4 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tool uses topo.max_cpu_num to determine number of entries needed for fd_percpu[] and irqs_per_cpu[]. For example on a system with 4 CPUs topo.max_cpu_num is 3 so we get too small array for holding per-CPU items. Fix this to use right number of entries, which is topo.max_cpu_num + 1. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: switch to tab delimited outputLen Brown2016-12-011-85/+85 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to tab-delimited output from fixed-width columns to make it simpler to import into spreadsheets. As the fixed width columnns were 8-spaces wide, the output on the screen should not change. Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: Gracefully handle ACPI S3Len Brown2016-12-011-42/+35

| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | turbostat gives valid results across suspend to idle, aka freeze, whether invoked in interval mode, or in command mode. Indeed, this can be used to measure suspend to idle: turbostat echo freeze > /sys/power/state But this does not work across suspend to ACPI S3, because the processor counters, including the TSC, are reset on resume. Further, when turbostat detects a problem, it does't forgive the hardware, and interval mode will print *'s from there on out. Instead, upon detecting counters going backwards, simply reset and start over. Interval mode across ACPI S3: (observe TSC going backwards) root@sharkbay:/home/lenb/turbostat-src# ./turbostat -M 0x10 CPU Avg_MHz Busy% Bzy_MHz TSC_MHz MSR 0x010 - 1 0.06 858 2294 0x0000000000000000 0 0 0.06 847 2294 0x0000002a254b98ac 1 1 0.06 878 2294 0x0000002a254efa3a 2 1 0.07 843 2294 0x0000002a2551df65 3 0 0.05 863 2294 0x0000002a2553fea2 turbostat: re-initialized with num_cpus 4 CPU Avg_MHz Busy% Bzy_MHz TSC_MHz MSR 0x010 - 2 0.20 849 2294 0x0000000000000000 0 2 0.26 856 2294 0x0000000449abb60d 1 2 0.20 844 2294 0x0000000449b087ec 2 2 0.21 850 2294 0x0000000449b35d5d 3 1 0.12 839 2294 0x0000000449b5fd5a ^C Command mode across ACPI S3: root@sharkbay:/home/lenb/turbostat-src# ./turbostat -M 0x10 sleep 10 ./turbostat: Counter reset detected 14.196299 sec Signed-off-by: Len Brown <len.brown@intel.com> | * | | tools/power turbostat: tidy up output on Joule counter overflowLen Brown2016-12-011-5/+1

| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RAPL Joules counter is limited in capacity. Turbostat estimates how soon it can roll-over based on the max TDP of the processor -- which tells us the maximum increment rate. eg. RAPL: 2759 sec. Joule Counter Range, at 95 Watts So if a sample duration is longer than 2759 seconds on this system, '**' replace the decimal place in the display to indicate that the results may be suspect. But the display had an extra ' ' in this case, throwing off the columns. Also, the -J "Joules" option appended an extra "time" column to the display. While this may be useful, it printed the interval time, which may not be the accurate time per processor. Remove this column, which appeared only when using '-J', as we plan to add accurate per-cpu interval times in a future commit. Signed-off-by: Len Brown <len.brown@intel.com> * | | | mm: add PageWaiters indicating tasks are waiting for a page bitNicholas Piggin2016-12-259-50/+174 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new page flag, PageWaiters, to indicate the page waitqueue has tasks waiting. This can be tested rather than testing waitqueue_active which requires another cacheline load. This bit is always set when the page has tasks on page_waitqueue(page), and is set and cleared under the waitqueue lock. It may be set when there are no tasks on the waitqueue, which will cause a harmless extra wakeup check that will clears the bit. The generic bit-waitqueue infrastructure is no longer used for pages. Instead, waitqueues are used directly with a custom key type. The generic code was not flexible enough to have PageWaiters manipulation under the waitqueue lock (which simplifies concurrency). This improves the performance of page lock intensive microbenchmarks by 2-3%. Putting two bits in the same word opens the opportunity to remove the memory barrier between clearing the lock bit and testing the waiters bit, after some work on the arch primitives (e.g., ensuring memory operand widths match and cover both bits). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Bob Peterson <rpeterso@redhat.com> Cc: Steven Whitehouse <swhiteho@redhat.com> Cc: Andrew Lutomirski <luto@kernel.org> Cc: Andreas Gruenbacher <agruenba@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mel Gorman <mgorman@techsingularity.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> * | | | mm: Use owner_priv bit for PageSwapCache, valid when PageSwapBackedNicholas Piggin2016-12-254-18/+25 | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A page is not added to the swap cache without being swap backed, so PageSwapBacked mappings can use PG_owner_priv_1 for PageSwapCache. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Hugh Dickins <hughd@google.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Bob Peterson <rpeterso@redhat.com> Cc: Steven Whitehouse <swhiteho@redhat.com> Cc: Andrew Lutomirski <luto@kernel.org> Cc: Andreas Gruenbacher <agruenba@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mel Gorman <mgorman@techsingularity.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> * | | Replace <asm/uaccess.h> with <linux/uaccess.h> globallyLinus Torvalds2016-12-24