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* Merge tag 'hwmon-for-linus-v4.16-rc2' of ↵Linus Torvalds2018-02-151-1/+4
|\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging Pull hwmon fix from Guenter Roeck: "Fix bad temperature display on Ryzen/Threadripper" * tag 'hwmon-for-linus-v4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: hwmon: (k10temp) Only apply temperature offset if result is positive
| * hwmon: (k10temp) Only apply temperature offset if result is positiveGuenter Roeck2018-02-121-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A user reports a really bad temperature on Ryzen 1950X. k10temp-pci-00cb Adapter: PCI adapter temp1: +4294948.3°C (high = +70.0°C) This will happen if the temperature reported by the chip is lower than the offset temperature. This has been seen in the field if "Sense MI Skew" and/or "Sense MI Offset" BIOS parameters were set to unexpected values. Let's report a temperature of 0 degrees C in that case. Fixes: 1b50b776355f ("hwmon: (k10temp) Add support for temperature offsets") Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* | Merge branch 'x86-pti-for-linus' of ↵Linus Torvalds2018-02-151-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 PTI and Spectre related fixes and updates from Ingo Molnar: "Here's the latest set of Spectre and PTI related fixes and updates: Spectre: - Add entry code register clearing to reduce the Spectre attack surface - Update the Spectre microcode blacklist - Inline the KVM Spectre helpers to get close to v4.14 performance again. - Fix indirect_branch_prediction_barrier() - Fix/improve Spectre related kernel messages - Fix array_index_nospec_mask() asm constraint - KVM: fix two MSR handling bugs PTI: - Fix a paranoid entry PTI CR3 handling bug - Fix comments objtool: - Fix paranoid_entry() frame pointer warning - Annotate WARN()-related UD2 as reachable - Various fixes - Add Add Peter Zijlstra as objtool co-maintainer Misc: - Various x86 entry code self-test fixes - Improve/simplify entry code stack frame generation and handling after recent heavy-handed PTI and Spectre changes. (There's two more WIP improvements expected here.) - Type fix for cache entries There's also some low risk non-fix changes I've included in this branch to reduce backporting conflicts: - rename a confusing x86_cpu field name - de-obfuscate the naming of single-TLB flushing primitives" * 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits) x86/entry/64: Fix CR3 restore in paranoid_exit() x86/cpu: Change type of x86_cache_size variable to unsigned int x86/spectre: Fix an error message x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping selftests/x86/mpx: Fix incorrect bounds with old _sigfault x86/mm: Rename flush_tlb_single() and flush_tlb_one() to __flush_tlb_one_[user|kernel]() x86/speculation: Add <asm/msr-index.h> dependency nospec: Move array_index_nospec() parameter checking into separate macro x86/speculation: Fix up array_index_nospec_mask() asm constraint x86/debug: Use UD2 for WARN() x86/debug, objtool: Annotate WARN()-related UD2 as reachable objtool: Fix segfault in ignore_unreachable_insn() selftests/x86: Disable tests requiring 32-bit support on pure 64-bit systems selftests/x86: Do not rely on "int $0x80" in single_step_syscall.c selftests/x86: Do not rely on "int $0x80" in test_mremap_vdso.c selftests/x86: Fix build bug caused by the 5lvl test which has been moved to the VM directory selftests/x86/pkeys: Remove unused functions selftests/x86: Clean up and document sscanf() usage selftests/x86: Fix vDSO selftest segfault for vsyscall=none x86/entry/64: Remove the unused 'icebp' macro ...
| * x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang2018-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | x86_mask is a confusing name which is hard to associate with the processor's stepping. Additionally, correct an indent issue in lib/cpu.c. Signed-off-by: Jia Zhang <qianyue.zj@alibaba-inc.com> [ Updated it to more recent kernels. ] Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: bp@alien8.de Cc: tony.luck@intel.com Link: http://lkml.kernel.org/r/1514771530-70829-1-git-send-email-qianyue.zj@alibaba-inc.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | hwmon: (k10temp) Add temperature offset for Ryzen 1900XGuenter Roeck2018-01-191-0/+1
|/ | | | | | | Like the other CPUs from the same series, the 1900X has a temperature offset of 27 degrees C. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) Correct model name for Ryzen 1600XGuenter Roeck2017-11-161-1/+1
| | | | | | Ryzen 1600X is a Ryzen 5 processor. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) Add support for temperature offsetsGuenter Roeck2017-10-301-0/+30
| | | | | | | | | Add support for handling temperature offset values for various AMD CPUs, similar to the code used in the coretemp driver for Intel CPUs. This is primarily for Ryzen CPUs (which has documented temperature offsets), but the code is kept generic to simplify adding additional CPUs. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) Add support for family 17hGuenter Roeck2017-10-301-0/+16
| | | | | | Add support for temperature sensors on Family 17h (Ryzen) processors. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) Move chip specific code into probe functionGuenter Roeck2017-10-301-17/+45
| | | | | | | Introduce a local data structure and determine the temperature read function at probe time to reduce runtime complexity. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) use permission-specific DEVICE_ATTR variantsJulia Lawall2017-01-021-6/+6
| | | | | | | | | | | | | Use DEVICE_ATTR_RO for read-only attributes. This simplifies the source code, improves readbility, and reduces the chance of inconsistencies. The conversion was done automatically using coccinelle. It was validated by compiling both the old and the new source code and comparing its text, data, and bss size. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> [groeck: Updated description] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) Remove duplicate pci-id defineAdam Majer2015-11-091-1/+0Star
| | | | | | | | PCI_DEVICE_ID_AMD_15H_M60H_NB_F3 is now defined in pci_ids.h Signed-off-by: Adam Majer <adamm@zombino.com> Acked-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Jean Delvare <jdelvare@suse.de>
* hwmon: (k10temp) Convert to devm_hwmon_device_register_with_groupsGuenter Roeck2014-09-221-76/+48Star
| | | | | | | | | Use devm_hwmon_device_register_with_groups() to simplify the code and reduce code size. Cc: Clemens Ladisch <clemens@ladisch.de> Tested-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (k10temp) Add support for F15h M60hAravind Gopalakrishnan2014-09-22