From 30d5ceeda8266a9b9d8ab58a2f128352d6aa4fe0 Mon Sep 17 00:00:00 2001 From: Sami Kerola Date: Thu, 16 May 2019 21:51:47 +0100 Subject: lscpu: remove extra space from field key name The extra space was more obvious in json output. But as the expected test output displays also the standard output can be effected by this change. $ lscpu --json | jq '.lscpu | .[].field' | grep ': ' "L1d cache: " "L1i cache: " "L2 cache: " "L3 cache: " "Vulnerability L1tf: " "Vulnerability Mds: " "Vulnerability Meltdown: " "Vulnerability Spec store bypass: " "Vulnerability Spectre v1: " "Vulnerability Spectre v2: " Signed-off-by: Sami Kerola --- sys-utils/lscpu.c | 6 +-- tests/expected/lscpu/lscpu-x86_64-epyc_7451 | 74 ++++++++++++++--------------- 2 files changed, 40 insertions(+), 40 deletions(-) diff --git a/sys-utils/lscpu.c b/sys-utils/lscpu.c index 9a5a1aa5b..ca7f6a037 100644 --- a/sys-utils/lscpu.c +++ b/sys-utils/lscpu.c @@ -2117,7 +2117,7 @@ print_summary(struct lscpu_desc *desc, struct lscpu_modifier *mod) tmp = size_to_human_string( SIZE_SUFFIX_3LETTER | SIZE_SUFFIX_SPACE, sz); - snprintf(buf, sizeof(buf), _("%s cache: "), ca->name); + snprintf(buf, sizeof(buf), _("%s cache:"), ca->name); add_summary_s(tb, buf, tmp); free(tmp); } @@ -2135,7 +2135,7 @@ print_summary(struct lscpu_desc *desc, struct lscpu_modifier *mod) tmp = size_to_human_string( SIZE_SUFFIX_3LETTER | SIZE_SUFFIX_SPACE, ca->size); - snprintf(buf, sizeof(buf), _("%s cache: "), ca->name); + snprintf(buf, sizeof(buf), _("%s cache:"), ca->name); add_summary_s(tb, buf, tmp); free(tmp); } @@ -2154,7 +2154,7 @@ print_summary(struct lscpu_desc *desc, struct lscpu_modifier *mod) if (desc->vuls) { for (i = 0; i < desc->nvuls; i++) { - snprintf(buf, sizeof(buf), ("Vulnerability %s: "), desc->vuls[i].name); + snprintf(buf, sizeof(buf), ("Vulnerability %s:"), desc->vuls[i].name); add_summary_s(tb, buf, desc->vuls[i].text); } } diff --git a/tests/expected/lscpu/lscpu-x86_64-epyc_7451 b/tests/expected/lscpu/lscpu-x86_64-epyc_7451 index e93eaf3e6..8c1b1030b 100644 --- a/tests/expected/lscpu/lscpu-x86_64-epyc_7451 +++ b/tests/expected/lscpu/lscpu-x86_64-epyc_7451 @@ -1,40 +1,40 @@ -CPU op-mode(s): 32-bit, 64-bit -Address sizes: 48 bits physical, 48 bits virtual -CPU(s): 96 -On-line CPU(s) list: 0-95 -Thread(s) per core: 2 -Core(s) per socket: 24 -Socket(s): 2 -NUMA node(s): 8 -Vendor ID: AuthenticAMD -CPU family: 23 -Model: 1 -Model name: AMD EPYC 7451 24-Core Processor -Stepping: 2 -Frequency boost: enabled -CPU MHz: 2894.214 -CPU max MHz: 2300.0000 -CPU min MHz: 1200.0000 -BogoMIPS: 4590.83 -Virtualization: AMD-V -L1d cache: 1.5 MiB -L1i cache: 3 MiB -L2 cache: 24 MiB -L3 cache: 128 MiB -NUMA node0 CPU(s): 0-5,48-53 -NUMA node1 CPU(s): 6-11,54-59 -NUMA node2 CPU(s): 12-17,60-65 -NUMA node3 CPU(s): 18-23,66-71 -NUMA node4 CPU(s): 24-29,72-77 -NUMA node5 CPU(s): 30-35,78-83 -NUMA node6 CPU(s): 36-41,84-89 -NUMA node7 CPU(s): 42-47,90-95 -Vulnerability L1tf: Not affected -Vulnerability Meltdown: Not affected -Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp -Vulnerability Spectre v1: Mitigation; __user pointer sanitization -Vulnerability Spectre v2: Mitigation; Full AMD retpoline, IBPB conditional, STIBP disabled, RSB filling -Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb hw_pstate ssbd ibpb vmmcall fsgsbase bmi1 avx2 smep bmi2 rdseed adx smap clflushopt sha_ni xsaveopt xsavec xgetbv1 xsaves clzero irperf xsaveerptr arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif overflow_recov succor smca +CPU op-mode(s): 32-bit, 64-bit +Address sizes: 48 bits physical, 48 bits virtual +CPU(s): 96 +On-line CPU(s) list: 0-95 +Thread(s) per core: 2 +Core(s) per socket: 24 +Socket(s): 2 +NUMA node(s): 8 +Vendor ID: AuthenticAMD +CPU family: 23 +Model: 1 +Model name: AMD EPYC 7451 24-Core Processor +Stepping: 2 +Frequency boost: enabled +CPU MHz: 2894.214 +CPU max MHz: 2300.0000 +CPU min MHz: 1200.0000 +BogoMIPS: 4590.83 +Virtualization: AMD-V +L1d cache: 1.5 MiB +L1i cache: 3 MiB +L2 cache: 24 MiB +L3 cache: 128 MiB +NUMA node0 CPU(s): 0-5,48-53 +NUMA node1 CPU(s): 6-11,54-59 +NUMA node2 CPU(s): 12-17,60-65 +NUMA node3 CPU(s): 18-23,66-71 +NUMA node4 CPU(s): 24-29,72-77 +NUMA node5 CPU(s): 30-35,78-83 +NUMA node6 CPU(s): 36-41,84-89 +NUMA node7 CPU(s): 42-47,90-95 +Vulnerability L1tf: Not affected +Vulnerability Meltdown: Not affected +Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp +Vulnerability Spectre v1: Mitigation; __user pointer sanitization +Vulnerability Spectre v2: Mitigation; Full AMD retpoline, IBPB conditional, STIBP disabled, RSB filling +Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb hw_pstate ssbd ibpb vmmcall fsgsbase bmi1 avx2 smep bmi2 rdseed adx smap clflushopt sha_ni xsaveopt xsavec xgetbv1 xsaves clzero irperf xsaveerptr arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif overflow_recov succor smca # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID -- cgit v1.2.3-55-g7522 From d2a1ee4e56182ba746053c6d41b6f29a2ce5554b Mon Sep 17 00:00:00 2001 From: Sami Kerola Date: Thu, 16 May 2019 21:56:57 +0100 Subject: include/strutils: fix potential null pointer dereference Recent lscpu fix caused gcc -Wnull-dereference to go off that this change addresses. Reference: b94acada9ed0e11a7e82f8f60280c5b6058e4250 Signed-off-by: Sami Kerola --- include/strutils.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/strutils.h b/include/strutils.h index 50733c5f5..d1f3da1b6 100644 --- a/include/strutils.h +++ b/include/strutils.h @@ -258,7 +258,9 @@ static inline void strrem(char *s, int rem) { char *p; - for (p = s; s && *s; s++) { + if (!s) + return; + for (p = s; *s; s++) { if (*s != rem) *p++ = *s; } -- cgit v1.2.3-55-g7522 From 23df051030add5f755633fc7a88ea66404f26adf Mon Sep 17 00:00:00 2001 From: Sami Kerola Date: Sat, 18 May 2019 18:43:08 +0100 Subject: lscpu: fix floating point exception As the title tells this change indeed fixes floating point exception, but post processing as value overwrite feels a wrong. Possibly something in input is making cpu set count to go wrong, but I could not get my head around what could it be. Anyway avoiding division by zero seems better than crashing so lets do this atleast for now. Caused-by: e5f721132ec8b8c933a396d8dcb3efcb67854f13 Addresses: https://github.com/karelzak/util-linux/issues/788 Reported-by: Lars Wendler Signed-off-by: Sami Kerola --- sys-utils/lscpu.c | 2 + tests/expected/lscpu/lscpu-vmware_fpe | 76 +++++++++++++++++++++++++++++++++ tests/ts/lscpu/dumps/vmware_fpe.tar.gz | Bin 0 -> 59743 bytes 3 files changed, 78 insertions(+) create mode 100644 tests/expected/lscpu/lscpu-vmware_fpe create mode 100644 tests/ts/lscpu/dumps/vmware_fpe.tar.gz diff --git a/sys-utils/lscpu.c b/sys-utils/lscpu.c index ca7f6a037..7f6277f00 100644 --- a/sys-utils/lscpu.c +++ b/sys-utils/lscpu.c @@ -1925,6 +1925,8 @@ static int get_cache_full_size(struct lscpu_desc *desc, /* Correction for CPU threads */ if (desc->nthreads > desc->ncores) nshares /= (desc->nthreads / desc->ncores); + if (nshares < 1) + nshares = 1; *res = (desc->ncores / nshares) * ca->size; return 0; diff --git a/tests/expected/lscpu/lscpu-vmware_fpe b/tests/expected/lscpu/lscpu-vmware_fpe new file mode 100644 index 000000000..2b68db277 --- /dev/null +++ b/tests/expected/lscpu/lscpu-vmware_fpe @@ -0,0 +1,76 @@ +CPU op-mode(s): 32-bit, 64-bit +Address sizes: 48 bits physical, 48 bits virtual +CPU(s): 16 +On-line CPU(s) list: 0-15 +Thread(s) per core: 2 +Core(s) per socket: 4 +Socket(s): 2 +NUMA node(s): 4 +Vendor ID: AuthenticAMD +CPU family: 21 +Model: 2 +Model name: AMD Opteron(tm) Processor 6328 +Stepping: 0 +Frequency boost: enabled +CPU MHz: 1605.776 +CPU max MHz: 3200.0000 +CPU min MHz: 1400.0000 +BogoMIPS: 6399.69 +Virtualization: AMD-V +L1d cache: 128 KiB +L1i cache: 512 KiB +L2 cache: 16 MiB +L3 cache: 24 MiB +NUMA node0 CPU(s): 0-3 +NUMA node1 CPU(s): 4-7 +NUMA node2 CPU(s): 8-11 +NUMA node3 CPU(s): 12-15 +Vulnerability L1tf: Not affected +Vulnerability Mds: Not affected +Vulnerability Meltdown: Not affected +Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp +Vulnerability Spectre v1: Mitigation; __user pointer sanitization +Vulnerability Spectre v2: Mitigation; Full AMD retpoline, IBPB conditional, STIBP disabled, RSB filling +Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate ssbd ibpb vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold + +# The following is the parsable format, which can be fed to other +# programs. Each different item in every column has an unique ID +# starting from zero. +# CPU,Core,Socket,Node,,L1d,L1i,L2,L3 +0,0,0,0,,0,0,0,0 +1,0,0,0,,1,0,0,0 +2,1,0,0,,2,1,1,0 +3,1,0,0,,3,1,1,0 +4,2,0,1,,4,2,2,1 +5,2,0,1,,5,2,2,1 +6,3,0,1,,6,3,3,1 +7,3,0,1,,7,3,3,1 +8,4,1,2,,8,4,4,2 +9,4,1,2,,9,4,4,2 +10,5,1,2,,10,5,5,2 +11,5,1,2,,11,5,5,2 +12,6,1,3,,12,6,6,3 +13,6,1,3,,13,6,6,3 +14,7,1,3,,14,7,7,3 +15,7,1,3,,15,7,7,3 + +# The following is the parsable format, which can be fed to other +# programs. Each different item in every column has an unique ID +# starting from zero. +# CPU,Core,Socket,Node,,L1d,L1i,L2,L3 +0,0,0,0,,0,0,0,0 +1,1,0,0,,1,0,0,0 +2,2,0,0,,2,1,1,0 +3,3,0,0,,3,1,1,0 +4,0,0,1,,4,2,2,1 +5,1,0,1,,5,2,2,1 +6,2,0,1,,6,3,3,1 +7,3,0,1,,7,3,3,1 +8,0,1,2,,8,4,4,2 +9,1,1,2,,9,4,4,2 +10,2,1,2,,10,5,5,2 +11,3,1,2,,11,5,5,2 +12,0,1,3,,12,6,6,3 +13,1,1,3,,13,6,6,3 +14,2,1,3,,14,7,7,3 +15,3,1,3,,15,7,7,3 diff --git a/tests/ts/lscpu/dumps/vmware_fpe.tar.gz b/tests/ts/lscpu/dumps/vmware_fpe.tar.gz new file mode 100644 index 000000000..1fc6aed4a Binary files /dev/null and b/tests/ts/lscpu/dumps/vmware_fpe.tar.gz differ -- cgit v1.2.3-55-g7522