From 8d124f0fc7c7acfec717935994bb877606d916ba Mon Sep 17 00:00:00 2001 From: Jeremy Linton Date: Thu, 16 May 2019 12:10:17 -0500 Subject: lscpu: Add additional aarch64 models ARM has released docs for Cortex-A76, Neoverse-N1 and Neoverse-E1. That means we know the midr partnums, so we can add them to the human readable model name table. Signed-off-by: Jeremy Linton --- sys-utils/lscpu-arm.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'sys-utils') diff --git a/sys-utils/lscpu-arm.c b/sys-utils/lscpu-arm.c index 37b8f66f6..fd9ab3f47 100644 --- a/sys-utils/lscpu-arm.c +++ b/sys-utils/lscpu-arm.c @@ -70,9 +70,12 @@ static const struct id_part arm_part[] = { { 0xd08, "Cortex-A72" }, { 0xd09, "Cortex-A73" }, { 0xd0a, "Cortex-A75" }, + { 0xd0b, "Cortex-A76" }, + { 0xd0c, "Neoverse-N1" }, { 0xd13, "Cortex-R52" }, { 0xd20, "Cortex-M23" }, { 0xd21, "Cortex-M33" }, + { 0xd4a, "Neoverse-E1" }, { -1, "unknown" }, }; -- cgit v1.2.3-55-g7522