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authorWeiwei Li2022-02-04 03:26:56 +0100
committerAlistair Francis2022-02-16 03:25:52 +0100
commit2bacb22446a45b07f542d32b6d760da757233b20 (patch)
treec82f0704c3f91cddad65bad7871cbbf424a5308e /.dir-locals.el
parenttarget/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE (diff)
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target/riscv: add support for svnapot extension
- add PTE_N bit - add PTE_N bit check for inner PTE - update address translation to support 64KiB continuous region (napot_bits = 4) Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220204022658.18097-4-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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