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| author | Max Filippov | 2012-05-27 16:34:51 +0200 |
|---|---|---|
| committer | Blue Swirl | 2012-06-09 12:45:03 +0200 |
| commit | 16bde77a298acfe15f5e948aceff550d0cb173e8 (patch) | |
| tree | 2a4fd3fc4825bc3fea803807070122f928cd9eda | |
| parent | target-xtensa: update EXCVADDR in case of page table lookup (diff) | |
| download | qemu-16bde77a298acfe15f5e948aceff550d0cb173e8.tar.gz qemu-16bde77a298acfe15f5e948aceff550d0cb173e8.tar.xz qemu-16bde77a298acfe15f5e948aceff550d0cb173e8.zip | |
target-xtensa: extract TLB entry setting method
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | target-xtensa/cpu.h | 3 | ||||
| -rw-r--r-- | target-xtensa/op_helper.c | 15 |
2 files changed, 14 insertions, 4 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 81f7833039..c2ca509698 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -381,6 +381,9 @@ void split_tlb_entry_spec_way(const CPUXtensaState *env, uint32_t v, bool dtlb, uint32_t *vpn, uint32_t wi, uint32_t *ei); int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb, uint32_t *pwi, uint32_t *pei, uint8_t *pring); +void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env, + xtensa_tlb_entry *entry, bool dtlb, + unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte); void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb, unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte); int xtensa_get_physical_addr(CPUXtensaState *env, diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index ce61157c91..663bb6dc62 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -655,6 +655,16 @@ uint32_t HELPER(ptlb)(uint32_t v, uint32_t dtlb) } } +void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env, + xtensa_tlb_entry *entry, bool dtlb, + unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte) +{ + entry->vaddr = vpn; + entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi); + entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff; + entry->attr = pte & 0xf; +} + void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb, unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte) { @@ -665,10 +675,7 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb, if (entry->asid) { tlb_flush_page(env, entry->vaddr); } - entry->vaddr = vpn; - entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi); - entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff; - entry->attr = pte & 0xf; + xtensa_tlb_set_entry_mmu(env, entry, dtlb, wi, ei, vpn, pte); tlb_flush_page(env, entry->vaddr); } else { qemu_log("%s %d, %d, %d trying to set immutable entry\n", |