diff options
| author | Bruno Larsen (billionai) | 2021-05-12 16:08:04 +0200 |
|---|---|---|
| committer | David Gibson | 2021-05-19 02:30:28 +0200 |
| commit | 172d74efdafe199eb94706827fc8b367b7452c93 (patch) | |
| tree | 7d8c82e26b9f9148257410019e805b89e6b71895 | |
| parent | target/ppc: updated vscr manipulation in machine.c (diff) | |
| download | qemu-172d74efdafe199eb94706827fc8b367b7452c93.tar.gz qemu-172d74efdafe199eb94706827fc8b367b7452c93.tar.xz qemu-172d74efdafe199eb94706827fc8b367b7452c93.zip | |
target/ppc: moved ppc_store_sdr1 to cpu.c
Moved this function that is required in !TCG cases into a
common code file
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210512140813.112884-3-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[dwg: Fixed compile error with linux-user targets]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target/ppc/cpu.c | 31 | ||||
| -rw-r--r-- | target/ppc/mmu_helper.c | 26 |
2 files changed, 31 insertions, 26 deletions
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index cb794e9f4f..d957d1a687 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -20,7 +20,10 @@ #include "qemu/osdep.h" #include "cpu.h" #include "cpu-models.h" +#include "cpu-qom.h" +#include "exec/log.h" #include "fpu/softfloat-helpers.h" +#include "mmu-hash64.h" target_ulong cpu_read_xer(CPUPPCState *env) { @@ -61,3 +64,31 @@ uint32_t ppc_get_vscr(CPUPPCState *env) uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0; return env->vscr | (sat << VSCR_SAT); } + +#ifdef CONFIG_SOFTMMU +void ppc_store_sdr1(CPUPPCState *env, target_ulong value) +{ + PowerPCCPU *cpu = env_archcpu(env); + qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, value); + assert(!cpu->vhyp); +#if defined(TARGET_PPC64) + if (mmu_is_64bit(env->mmu_model)) { + target_ulong sdr_mask = SDR_64_HTABORG | SDR_64_HTABSIZE; + target_ulong htabsize = value & SDR_64_HTABSIZE; + + if (value & ~sdr_mask) { + error_report("Invalid bits 0x"TARGET_FMT_lx" set in SDR1", + value & ~sdr_mask); + value &= sdr_mask; + } + if (htabsize > 28) { + error_report("Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1", + htabsize); + return; + } + } +#endif /* defined(TARGET_PPC64) */ + /* FIXME: Should check for valid HTABMASK values in 32-bit case */ + env->spr[SPR_SDR1] = value; +} +#endif /* CONFIG_SOFTMMU */ diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index ca88658cba..06e1ebdcbc 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -2085,32 +2085,6 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr) /*****************************************************************************/ /* Special registers manipulation */ -void ppc_store_sdr1(CPUPPCState *env, target_ulong value) -{ - PowerPCCPU *cpu = env_archcpu(env); - qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, value); - assert(!cpu->vhyp); -#if defined(TARGET_PPC64) - if (mmu_is_64bit(env->mmu_model)) { - target_ulong sdr_mask = SDR_64_HTABORG | SDR_64_HTABSIZE; - target_ulong htabsize = value & SDR_64_HTABSIZE; - - if (value & ~sdr_mask) { - error_report("Invalid bits 0x"TARGET_FMT_lx" set in SDR1", - value & ~sdr_mask); - value &= sdr_mask; - } - if (htabsize > 28) { - error_report("Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1", - htabsize); - return; - } - } -#endif /* defined(TARGET_PPC64) */ - /* FIXME: Should check for valid HTABMASK values in 32-bit case */ - env->spr[SPR_SDR1] = value; -} - #if defined(TARGET_PPC64) void ppc_store_ptcr(CPUPPCState *env, target_ulong value) { |