diff options
| author | Richard Henderson | 2019-08-08 22:26:10 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-08-16 15:02:51 +0200 |
| commit | 191f4bfe8d6cf0c7d5cd7f84cd7076e32e3745dd (patch) | |
| tree | 3a99e12f461b30045e9765dd9618fb98013462b1 | |
| parent | target/arm/kvm64: Move the get/put of fpsimd registers out (diff) | |
| download | qemu-191f4bfe8d6cf0c7d5cd7f84cd7076e32e3745dd.tar.gz qemu-191f4bfe8d6cf0c7d5cd7f84cd7076e32e3745dd.tar.xz qemu-191f4bfe8d6cf0c7d5cd7f84cd7076e32e3745dd.zip | |
target/arm: Use tcg_gen_extract_i32 for shifter_out_im
Extract is a compact combination of shift + and.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190808202616.13782-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/translate.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 34e65cd80c..14d6b6d4d2 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -605,14 +605,7 @@ static void gen_sar(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) static void shifter_out_im(TCGv_i32 var, int shift) { - if (shift == 0) { - tcg_gen_andi_i32(cpu_CF, var, 1); - } else { - tcg_gen_shri_i32(cpu_CF, var, shift); - if (shift != 31) { - tcg_gen_andi_i32(cpu_CF, cpu_CF, 1); - } - } + tcg_gen_extract_i32(cpu_CF, var, shift, 1); } /* Shift by immediate. Includes special handling for shift == 0. */ |