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author | Richard Henderson | 2019-08-09 19:11:56 +0200 |
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committer | Laurent Vivier | 2019-09-10 10:29:07 +0200 |
commit | 2041df4a050cec1efbba4f87e2bb9c40e7fd6cdf (patch) | |
tree | f8d258940f0eb5859122e138be2cf462b1af7fe0 | |
parent | linux-user: remove useless variable (diff) | |
download | qemu-2041df4a050cec1efbba4f87e2bb9c40e7fd6cdf.tar.gz qemu-2041df4a050cec1efbba4f87e2bb9c40e7fd6cdf.tar.xz qemu-2041df4a050cec1efbba4f87e2bb9c40e7fd6cdf.zip |
linux-user: Add AT_HWCAP2 for aarch64-linux-user
Add the HWCAP2_* bits from kernel version v5.3-rc3.
Enable the bits corresponding to ARMv8.5-CondM and ARMv8.5-FRINT.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20190809171156.3476-1-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
-rw-r--r-- | linux-user/elfload.c | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 3365e192eb..43c16a846d 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -607,9 +607,23 @@ enum { ARM_HWCAP_A64_SB = 1 << 29, ARM_HWCAP_A64_PACA = 1 << 30, ARM_HWCAP_A64_PACG = 1UL << 31, + + ARM_HWCAP2_A64_DCPODP = 1 << 0, + ARM_HWCAP2_A64_SVE2 = 1 << 1, + ARM_HWCAP2_A64_SVEAES = 1 << 2, + ARM_HWCAP2_A64_SVEPMULL = 1 << 3, + ARM_HWCAP2_A64_SVEBITPERM = 1 << 4, + ARM_HWCAP2_A64_SVESHA3 = 1 << 5, + ARM_HWCAP2_A64_SVESM4 = 1 << 6, + ARM_HWCAP2_A64_FLAGM2 = 1 << 7, + ARM_HWCAP2_A64_FRINT = 1 << 8, }; -#define ELF_HWCAP get_elf_hwcap() +#define ELF_HWCAP get_elf_hwcap() +#define ELF_HWCAP2 get_elf_hwcap2() + +#define GET_FEATURE_ID(feat, hwcap) \ + do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0) static uint32_t get_elf_hwcap(void) { @@ -621,8 +635,6 @@ static uint32_t get_elf_hwcap(void) hwcaps |= ARM_HWCAP_A64_CPUID; /* probe for the extra features */ -#define GET_FEATURE_ID(feat, hwcap) \ - do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0) GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES); GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL); @@ -645,11 +657,22 @@ static uint32_t get_elf_hwcap(void) GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB); GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM); -#undef GET_FEATURE_ID + return hwcaps; +} + +static uint32_t get_elf_hwcap2(void) +{ + ARMCPU *cpu = ARM_CPU(thread_cpu); + uint32_t hwcaps = 0; + + GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2); + GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT); return hwcaps; } +#undef GET_FEATURE_ID + #endif /* not TARGET_AARCH64 */ #endif /* TARGET_ARM */ |