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| author | Bobby Bingham | 2013-11-24 21:03:05 +0100 |
|---|---|---|
| committer | Aurelien Jarno | 2013-12-09 16:41:23 +0100 |
| commit | 21c046118e740704d0ba81f6281dc95905bc30a8 (patch) | |
| tree | 2a12c1bf0ddfcaf3bdeb3f03bb252ada89ab214c | |
| parent | target-cris: Use new qemu_ld/st opcodes (diff) | |
| download | qemu-21c046118e740704d0ba81f6281dc95905bc30a8.tar.gz qemu-21c046118e740704d0ba81f6281dc95905bc30a8.tar.xz qemu-21c046118e740704d0ba81f6281dc95905bc30a8.zip | |
target-sh4: move features flag after CPU_COMMON
Everything before CPU_COMMON in the structure is cleared as part of a
CPU reset. This included the features flag, which indicates whether SH4A
instructions are supported or not. As a result, a CPU reset downgraded
the CPU from an SH4A to an SH4.
Signed-off-by: Bobby Bingham <koorogi@koorogi.info>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-sh4/cpu.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 276d2955c3..c181ddacf5 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -157,9 +157,6 @@ typedef struct CPUSH4State { /* float point status register */ float_status fp_status; - /* The features that we should emulate. See sh_features above. */ - uint32_t features; - /* Those belong to the specific unit (SH7750) but are handled here */ uint32_t mmucr; /* MMU control register */ uint32_t pteh; /* page table entry high register */ @@ -180,6 +177,9 @@ typedef struct CPUSH4State { int id; /* CPU model */ + /* The features that we should emulate. See sh_features above. */ + uint32_t features; + void *intc_handle; int in_sleep; /* SR_BL ignored during sleep */ memory_content *movcal_backup; |