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| author | Richard Henderson | 2021-03-09 16:53:01 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-03-12 13:40:10 +0100 |
| commit | 2acbfbe4313daf43b6653ee5d82bcaeaa155e895 (patch) | |
| tree | b3e76342e3e5e310af2685c172a6b0462351a1be | |
| parent | target/arm: Fix sve_punpk_p vs odd vector lengths (diff) | |
| download | qemu-2acbfbe4313daf43b6653ee5d82bcaeaa155e895.tar.gz qemu-2acbfbe4313daf43b6653ee5d82bcaeaa155e895.tar.xz qemu-2acbfbe4313daf43b6653ee5d82bcaeaa155e895.zip | |
target/arm: Update find_last_active for PREDDESC
Since b64ee454a4a0, all predicate operations should be
using these field macros for predicates.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210309155305.11301-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/sve_helper.c | 6 | ||||
| -rw-r--r-- | target/arm/translate-sve.c | 7 |
2 files changed, 6 insertions, 7 deletions
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 981895a17c..224c767944 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -2237,10 +2237,10 @@ void HELPER(sve_compact_d)(void *vd, void *vn, void *vg, uint32_t desc) */ int32_t HELPER(sve_last_active_element)(void *vg, uint32_t pred_desc) { - intptr_t oprsz = extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; - intptr_t esz = extract32(pred_desc, SIMD_DATA_SHIFT, 2); + intptr_t words = DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ), 8); + intptr_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ); - return last_active_element(vg, DIV_ROUND_UP(oprsz, 8), esz); + return last_active_element(vg, words, esz); } void HELPER(sve_splice)(void *vd, void *vn, void *vm, void *vg, uint32_t desc) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 27402af23c..cac8082156 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -2302,11 +2302,10 @@ static void find_last_active(DisasContext *s, TCGv_i32 ret, int esz, int pg) */ TCGv_ptr t_p = tcg_temp_new_ptr(); TCGv_i32 t_desc; - unsigned vsz = pred_full_reg_size(s); - unsigned desc; + unsigned desc = 0; - desc = vsz - 2; - desc = deposit32(desc, SIMD_DATA_SHIFT, 2, esz); + desc = FIELD_DP32(desc, PREDDESC, OPRSZ, pred_full_reg_size(s)); + desc = FIELD_DP32(desc, PREDDESC, ESZ, esz); tcg_gen_addi_ptr(t_p, cpu_env, pred_full_reg_offset(s, pg)); t_desc = tcg_const_i32(desc); |