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| author | Philippe Mathieu-Daudé | 2020-11-29 23:39:04 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2021-01-14 17:13:53 +0100 |
| commit | 33942f94604153af66f50ad0bc41edc620e82d51 (patch) | |
| tree | e5f52e1f4459846398092a23f76022d459125013 | |
| parent | target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA (diff) | |
| download | qemu-33942f94604153af66f50ad0bc41edc620e82d51.tar.gz qemu-33942f94604153af66f50ad0bc41edc620e82d51.tar.xz qemu-33942f94604153af66f50ad0bc41edc620e82d51.zip | |
target/mips: Simplify MSA TCG logic
Only decode MSA opcodes if MSA is present (implemented).
Now than check_msa_access() will only be called if MSA is
present, the only way to have MIPS_HFLAG_MSA unset is if
MSA is disabled (bit CP0C5_MSAEn cleared, see previous
commit). Therefore we can remove the 'reserved instruction'
exception.
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201208003702.4088927-5-f4bug@amsat.org>
| -rw-r--r-- | target/mips/translate.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index d87fbaf0ec..9a0dcde2a0 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28567,13 +28567,8 @@ static inline int check_msa_access(DisasContext *ctx) } if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) { - if (ctx->insn_flags & ASE_MSA) { - generate_exception_end(ctx, EXCP_MSADIS); - return 0; - } else { - gen_reserved_instruction(ctx); - return 0; - } + generate_exception_end(ctx, EXCP_MSADIS); + return 0; } return 1; } @@ -30417,7 +30412,7 @@ static void gen_msa_vec(CPUMIPSState *env, DisasContext *ctx) static void gen_msa(CPUMIPSState *env, DisasContext *ctx) { uint32_t opcode = ctx->opcode; - check_insn(ctx, ASE_MSA); + check_msa_access(ctx); switch (MASK_MSA_MINOR(opcode)) { @@ -31047,9 +31042,11 @@ static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx) case OPC_BNZ_H: case OPC_BNZ_W: case OPC_BNZ_D: - check_insn(ctx, ASE_MSA); - gen_msa_branch(env, ctx, op1); - break; + if (ase_msa_available(env)) { + gen_msa_branch(env, ctx, op1); + break; + } + /* fall through */ default: MIPS_INVAL("cp1"); gen_reserved_instruction(ctx); @@ -31238,7 +31235,9 @@ static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx) #endif } else { /* MDMX: Not implemented. */ - gen_msa(env, ctx); + if (ase_msa_available(env)) { + gen_msa(env, ctx); + } } break; case OPC_PCREL: |