diff options
| author | Alistair Francis | 2020-03-26 23:44:07 +0100 |
|---|---|---|
| committer | Alistair Francis | 2020-04-29 22:16:36 +0200 |
| commit | 384728905441279e54fa3d714b11bf1b1bcbfd27 (patch) | |
| tree | 78f1856c2f304cfdfa12f21bf8057435ae0dc5d2 | |
| parent | riscv/sifive_u: Add a serial property to the sifive_u machine (diff) | |
| download | qemu-384728905441279e54fa3d714b11bf1b1bcbfd27.tar.gz qemu-384728905441279e54fa3d714b11bf1b1bcbfd27.tar.xz qemu-384728905441279e54fa3d714b11bf1b1bcbfd27.zip | |
riscv: Don't use stage-2 PTE lookup protection flags
When doing the fist of a two stage lookup (Hypervisor extensions) don't
set the current protection flags from the second stage lookup of the
base address PTE.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Anup Patel <anup@brainfault.org>
Message-id: 931db85d6890ed4bc2b527fd1011197cd28299aa.1585262586.git.alistair.francis@wdc.com
Message-Id: <931db85d6890ed4bc2b527fd1011197cd28299aa.1585262586.git.alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/cpu_helper.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index d3ba9efb02..f36d184b7b 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -452,10 +452,11 @@ restart: hwaddr pte_addr; if (two_stage && first_stage) { + int vbase_prot; hwaddr vbase; /* Do the second stage translation on the base PTE address. */ - get_physical_address(env, &vbase, prot, base, access_type, + get_physical_address(env, &vbase, &vbase_prot, base, access_type, mmu_idx, false, true); pte_addr = vbase + idx * ptesize; |