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authorNolan Leake2021-06-25 23:02:09 +0200
committerPeter Maydell2021-07-02 12:48:36 +0200
commit38f2cfbbc3f2958cba542b1e264a8027eeca4835 (patch)
tree975ee16dac04fb65d7f66648c8fdf64a0ad3f262
parentdocs/system/arm: Add quanta-gbs-bmc reference (diff)
downloadqemu-38f2cfbbc3f2958cba542b1e264a8027eeca4835.tar.gz
qemu-38f2cfbbc3f2958cba542b1e264a8027eeca4835.tar.xz
qemu-38f2cfbbc3f2958cba542b1e264a8027eeca4835.zip
hw/arm: Add basic power management to raspi.
This is just enough to make reboot and poweroff work. Works for linux, u-boot, and the arm trusted firmware. Not tested, but should work for plan9, and bare-metal/hobby OSes, since they seem to generally do what linux does for reset. The watchdog timer functionality is not yet implemented. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/64 Signed-off-by: Nolan Leake <nolan@sigbus.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210625210209.1870217-1-nolan@sigbus.net [PMM: tweaked commit title; fixed region size to 0x200; moved header file to include/] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/bcm2835_peripherals.c13
-rw-r--r--hw/misc/bcm2835_powermgt.c160
-rw-r--r--hw/misc/meson.build1
-rw-r--r--include/hw/arm/bcm2835_peripherals.h3
-rw-r--r--include/hw/misc/bcm2835_powermgt.h29
5 files changed, 204 insertions, 2 deletions
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index dcff13433e..48538c9360 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -126,6 +126,10 @@ static void bcm2835_peripherals_init(Object *obj)
object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
OBJECT(&s->gpu_bus_mr));
+
+ /* Power Management */
+ object_initialize_child(obj, "powermgt", &s->powermgt,
+ TYPE_BCM2835_POWERMGT);
}
static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
@@ -364,9 +368,16 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
INTERRUPT_USB));
+ /* Power Management */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
+ return;
+ }
+
+ memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
+
create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
- create_unimp(s, &s->powermgt, "bcm2835-powermgt", PM_OFFSET, 0x114);
create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
diff --git a/hw/misc/bcm2835_powermgt.c b/hw/misc/bcm2835_powermgt.c
new file mode 100644
index 0000000000..25fa804cbd
--- /dev/null
+++ b/hw/misc/bcm2835_powermgt.c
@@ -0,0 +1,160 @@
+/*
+ * BCM2835 Power Management emulation
+ *
+ * Copyright (C) 2017 Marcin Chojnacki <marcinch7@gmail.com>
+ * Copyright (C) 2021 Nolan Leake <nolan@sigbus.net>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "qemu/module.h"
+#include "hw/misc/bcm2835_powermgt.h"
+#include "migration/vmstate.h"
+#include "sysemu/runstate.h"
+
+#define PASSWORD 0x5a000000
+#define PASSWORD_MASK 0xff000000
+
+#define R_RSTC 0x1c
+#define V_RSTC_RESET 0x20
+#define R_RSTS 0x20
+#define V_RSTS_POWEROFF 0x555 /* Linux uses partition 63 to indicate halt. */
+#define R_WDOG 0x24
+
+static uint64_t bcm2835_powermgt_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ BCM2835PowerMgtState *s = (BCM2835PowerMgtState *)opaque;
+ uint32_t res = 0;
+
+ switch (offset) {
+ case R_RSTC:
+ res = s->rstc;
+ break;
+ case R_RSTS:
+ res = s->rsts;
+ break;
+ case R_WDOG:
+ res = s->wdog;
+ break;
+
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_powermgt_read: Unknown offset 0x%08"HWADDR_PRIx
+ "\n", offset);
+ res = 0;
+ break;
+ }
+
+ return res;
+}
+
+static void bcm2835_powermgt_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ BCM2835PowerMgtState *s = (BCM2835PowerMgtState *)opaque;
+
+ if ((value & PASSWORD_MASK) != PASSWORD) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "bcm2835_powermgt_write: Bad password 0x%"PRIx64
+ " at offset 0x%08"HWADDR_PRIx"\n",
+ value, offset);
+ return;
+ }
+
+ value = value & ~PASSWORD_MASK;
+
+ switch (offset) {
+ case R_RSTC:
+ s->rstc = value;
+ if (value & V_RSTC_RESET) {
+ if ((s->rsts & 0xfff) == V_RSTS_POWEROFF) {
+ qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ } else {
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+ }
+ }
+ break;
+ case R_RSTS:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_powermgt_write: RSTS\n");
+ s->rsts = value;
+ break;
+ case R_WDOG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_powermgt_write: WDOG\n");
+ s->wdog = value;
+ break;
+
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_powermgt_write: Unknown offset 0x%08"HWADDR_PRIx
+ "\n", offset);
+ break;
+ }
+}
+
+static const MemoryRegionOps bcm2835_powermgt_ops = {
+ .read = bcm2835_powermgt_read,
+ .write = bcm2835_powermgt_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
+};
+
+static const VMStateDescription vmstate_bcm2835_powermgt = {
+ .name = TYPE_BCM2835_POWERMGT,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(rstc, BCM2835PowerMgtState),
+ VMSTATE_UINT32(rsts, BCM2835PowerMgtState),
+ VMSTATE_UINT32(wdog, BCM2835PowerMgtState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void bcm2835_powermgt_init(Object *obj)
+{
+ BCM2835PowerMgtState *s = BCM2835_POWERMGT(obj);
+
+ memory_region_init_io(&s->iomem, obj, &bcm2835_powermgt_ops, s,
+ TYPE_BCM2835_POWERMGT, 0x200);
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
+}
+
+static void bcm2835_powermgt_reset(DeviceState *dev)
+{
+ BCM2835PowerMgtState *s = BCM2835_POWERMGT(dev);
+
+ /* https://elinux.org/BCM2835_registers#PM */
+ s->rstc = 0x00000102;
+ s->rsts = 0x00001000;
+ s->wdog = 0x00000000;
+}
+
+static void bcm2835_powermgt_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->reset = bcm2835_powermgt_reset;
+ dc->vmsd = &vmstate_bcm2835_powermgt;
+}
+
+static TypeInfo bcm2835_powermgt_info = {
+ .name = TYPE_BCM2835_POWERMGT,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(BCM2835PowerMgtState),
+ .class_init = bcm2835_powermgt_class_init,
+ .instance_init = bcm2835_powermgt_init,
+};
+
+static void bcm2835_powermgt_register_types(void)
+{
+ type_register_static(&bcm2835_powermgt_info);
+}
+
+type_init(bcm2835_powermgt_register_types)
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 66e1648533..f89b5c1643 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -82,6 +82,7 @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
'bcm2835_rng.c',
'bcm2835_thermal.c',
'bcm2835_cprman.c',
+ 'bcm2835_powermgt.c',
))
softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c', 'zynq-xadc.c'))
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 479e2346e8..d864879421 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -24,6 +24,7 @@
#include "hw/misc/bcm2835_mphi.h"
#include "hw/misc/bcm2835_thermal.h"
#include "hw/misc/bcm2835_cprman.h"
+#include "hw/misc/bcm2835_powermgt.h"
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
@@ -48,7 +49,7 @@ struct BCM2835PeripheralState {
BCM2835MphiState mphi;
UnimplementedDeviceState txp;
UnimplementedDeviceState armtmr;
- UnimplementedDeviceState powermgt;
+ BCM2835PowerMgtState powermgt;
BCM2835CprmanState cprman;
PL011State uart0;
BCM2835AuxState aux;
diff --git a/include/hw/misc/bcm2835_powermgt.h b/include/hw/misc/bcm2835_powermgt.h
new file mode 100644
index 0000000000..303b9a6f68
--- /dev/null
+++ b/include/hw/misc/bcm2835_powermgt.h
@@ -0,0 +1,29 @@
+/*
+ * BCM2835 Power Management emulation
+ *
+ * Copyright (C) 2017 Marcin Chojnacki <marcinch7@gmail.com>
+ * Copyright (C) 2021 Nolan Leake <nolan@sigbus.net>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef BCM2835_POWERMGT_H
+#define BCM2835_POWERMGT_H
+
+#include "hw/sysbus.h"
+#include "qom/object.h"
+
+#define TYPE_BCM2835_POWERMGT "bcm2835-powermgt"
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835PowerMgtState, BCM2835_POWERMGT)
+
+struct BCM2835PowerMgtState {
+ SysBusDevice busdev;
+ MemoryRegion iomem;
+
+ uint32_t rstc;
+ uint32_t rsts;
+ uint32_t wdog;
+};
+
+#endif