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| author | Sai Pavan Boddu | 2022-06-08 20:38:47 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-06-08 20:38:47 +0200 |
| commit | 39f40d02f6af8e4718100b6a3854e963c962cfd7 (patch) | |
| tree | bc66a9bc3d90985e335651c09b1c798ade0171bf | |
| parent | xlnx_dp: Introduce a vblank signal (diff) | |
| download | qemu-39f40d02f6af8e4718100b6a3854e963c962cfd7.tar.gz qemu-39f40d02f6af8e4718100b6a3854e963c962cfd7.tar.xz qemu-39f40d02f6af8e4718100b6a3854e963c962cfd7.zip | |
xlnx_dp: Fix the interrupt disable logic
Fix interrupt disable logic. Mask value 1 indicates that interrupts are
disabled.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Frederic Konrad <fkonrad@amd.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220601172353.3220232-4-fkonrad@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/display/xlnx_dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index ed856b596d..a071c81883 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -889,7 +889,7 @@ static void xlnx_dp_write(void *opaque, hwaddr offset, uint64_t value, xlnx_dp_update_irq(s); break; case DP_INT_DS: - s->core_registers[DP_INT_MASK] |= ~value; + s->core_registers[DP_INT_MASK] |= value; xlnx_dp_update_irq(s); break; default: |