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authorCédric Le Goater2019-09-04 09:04:59 +0200
committerPeter Maydell2019-09-13 17:05:00 +0200
commit3a714681507c561f1b1f509061c1e8e8f501eaf3 (patch)
tree03fb93383d5c2b5cc0068a8efc93d70eed92cab4
parentaspeed: add a GPIO controller to the SoC (diff)
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aspeed: Remove unused SoC definitions
There are no QEMU Aspeed machines using the SoCs "ast2400-a0" or "ast2400". Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20190904070506.1052-4-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/aspeed_soc.c26
1 files changed, 0 insertions, 26 deletions
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 04480875d0..3aa73d2438 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -118,19 +118,6 @@ static const char *aspeed_soc_ast2500_typenames[] = {
static const AspeedSoCInfo aspeed_socs[] = {
{
- .name = "ast2400-a0",
- .cpu_type = ARM_CPU_TYPE_NAME("arm926"),
- .silicon_rev = AST2400_A0_SILICON_REV,
- .sram_size = 0x8000,
- .spis_num = 1,
- .fmc_typename = "aspeed.smc.fmc",
- .spi_typename = aspeed_soc_ast2400_typenames,
- .gpio_typename = "aspeed.gpio-ast2400",
- .wdts_num = 2,
- .irqmap = aspeed_soc_ast2400_irqmap,
- .memmap = aspeed_soc_ast2400_memmap,
- .num_cpus = 1,
- }, {
.name = "ast2400-a1",
.cpu_type = ARM_CPU_TYPE_NAME("arm926"),
.silicon_rev = AST2400_A1_SILICON_REV,
@@ -144,19 +131,6 @@ static const AspeedSoCInfo aspeed_socs[] = {
.memmap = aspeed_soc_ast2400_memmap,
.num_cpus = 1,
}, {
- .name = "ast2400",
- .cpu_type = ARM_CPU_TYPE_NAME("arm926"),
- .silicon_rev = AST2400_A0_SILICON_REV,
- .sram_size = 0x8000,
- .spis_num = 1,
- .fmc_typename = "aspeed.smc.fmc",
- .spi_typename = aspeed_soc_ast2400_typenames,
- .gpio_typename = "aspeed.gpio-ast2400",
- .wdts_num = 2,
- .irqmap = aspeed_soc_ast2400_irqmap,
- .memmap = aspeed_soc_ast2400_memmap,
- .num_cpus = 1,
- }, {
.name = "ast2500-a1",
.cpu_type = ARM_CPU_TYPE_NAME("arm1176"),
.silicon_rev = AST2500_A1_SILICON_REV,