diff options
| author | Peter Maydell | 2016-02-11 12:17:31 +0100 |
|---|---|---|
| committer | Peter Maydell | 2016-02-11 12:17:31 +0100 |
| commit | 3ad901bc2b98f5539af9a7d4aef140a6d8fa6442 (patch) | |
| tree | 825746b05669c15dc3c8a28cd5cfb371d9974951 | |
| parent | target-arm: Implement NSACR trapping behaviour (diff) | |
| download | qemu-3ad901bc2b98f5539af9a7d4aef140a6d8fa6442.tar.gz qemu-3ad901bc2b98f5539af9a7d4aef140a6d8fa6442.tar.xz qemu-3ad901bc2b98f5539af9a7d4aef140a6d8fa6442.zip | |
target-arm: Enable EL3 for Cortex-A53 and Cortex-A57
Enable EL3 support for our Cortex-A53 and Cortex-A57 CPU models.
We have enough implemented now to be able to run real world code
at least to some extent (I can boot ARM Trusted Firmware to the
point where it pulls in OP-TEE and then falls over because it
doesn't have a UEFI image it can chain to).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1454506721-11843-8-git-send-email-peter.maydell@linaro.org
| -rw-r--r-- | target-arm/cpu64.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index c847513b25..c5bc19a405 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -109,6 +109,7 @@ static void aarch64_a57_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); + set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57; cpu->midr = 0x411fd070; cpu->revidr = 0x00000000; @@ -161,6 +162,7 @@ static void aarch64_a53_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); + set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A53; cpu->midr = 0x410fd034; cpu->revidr = 0x00000000; |