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| author | Laurent Vivier | 2016-01-16 23:33:43 +0100 |
|---|---|---|
| committer | Laurent Vivier | 2016-10-28 10:38:48 +0200 |
| commit | 415f4b62eb4629bd3702e6fb8aa51437a92983ff (patch) | |
| tree | 7d5af85bb6417ad622b0528b8f59eaf308a24d7b | |
| parent | target-m68k: and can manage word and byte operands (diff) | |
| download | qemu-415f4b62eb4629bd3702e6fb8aa51437a92983ff.tar.gz qemu-415f4b62eb4629bd3702e6fb8aa51437a92983ff.tar.xz qemu-415f4b62eb4629bd3702e6fb8aa51437a92983ff.zip | |
target-m68k: suba/adda can manage word operand
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target-m68k/translate.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 3f7db833f8..b82ebf39eb 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -2011,7 +2011,7 @@ DISAS_INSN(suba) TCGv src; TCGv reg; - SRC_EA(env, src, OS_LONG, 0, NULL); + SRC_EA(env, src, (insn & 0x100) ? OS_LONG : OS_WORD, 1, NULL); reg = AREG(insn, 9); tcg_gen_sub_i32(reg, reg, src); } @@ -2203,7 +2203,7 @@ DISAS_INSN(adda) TCGv src; TCGv reg; - SRC_EA(env, src, OS_LONG, 0, NULL); + SRC_EA(env, src, (insn & 0x100) ? OS_LONG : OS_WORD, 1, NULL); reg = AREG(insn, 9); tcg_gen_add_i32(reg, reg, src); } @@ -3351,6 +3351,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(subx_reg, 9100, f138, M68000); INSN(subx_mem, 9108, f138, M68000); INSN(suba, 91c0, f1c0, CF_ISA_A); + INSN(suba, 90c0, f0c0, M68000); BASE(undef_mac, a000, f000); INSN(mac, a000, f100, CF_EMAC); |