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| author | Richard Henderson | 2020-06-26 05:31:10 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-26 15:31:12 +0200 |
| commit | 438efea0bb639c9c2dfb42c8d9459e21aa183c8a (patch) | |
| tree | bbef85d1f0d7bf85c82fd7791e7b9bf0bad30f30 | |
| parent | target/arm: Implement the ADDG, SUBG instructions (diff) | |
| download | qemu-438efea0bb639c9c2dfb42c8d9459e21aa183c8a.tar.gz qemu-438efea0bb639c9c2dfb42c8d9459e21aa183c8a.tar.xz qemu-438efea0bb639c9c2dfb42c8d9459e21aa183c8a.zip | |
target/arm: Implement the GMI instruction
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/translate-a64.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2ec02c8a5f..ee9dfa8e43 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5346,6 +5346,21 @@ static void disas_data_proc_2src(DisasContext *s, uint32_t insn) cpu_reg_sp(s, rn)); } break; + case 5: /* GMI */ + if (sf == 0 || !dc_isar_feature(aa64_mte_insn_reg, s)) { + goto do_unallocated; + } else { + TCGv_i64 t1 = tcg_const_i64(1); + TCGv_i64 t2 = tcg_temp_new_i64(); + + tcg_gen_extract_i64(t2, cpu_reg_sp(s, rn), 56, 4); + tcg_gen_shl_i64(t1, t1, t2); + tcg_gen_or_i64(cpu_reg(s, rd), cpu_reg(s, rm), t1); + + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + } + break; case 8: /* LSLV */ handle_shift_reg(s, A64_SHIFT_TYPE_LSL, sf, rm, rn, rd); break; |