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authorIgor Mammedov2022-11-21 16:36:12 +0100
committerMichael S. Tsirkin2022-11-22 11:19:00 +0100
commit4fd75ce0760ad645ce4b8fe589717aee4f8c0da6 (patch)
tree10af673e320d21ca242c1f0a9216b7790930a131
parenttests: acpi: whitelist DSDT before moving PRQx to _SB scope (diff)
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acpi: x86: move RPQx field back to _SB scope
Commit 47a373faa6b2 (acpi: pc/q35: drop ad-hoc PCI-ISA bridge AML routines and let bus ennumeration generate AML) moved ISA bridge AML generation to respective devices and was using aml_alias() to provide PRQx fields in _SB. scope. However, it turned out that SeaBIOS was not able to process Alias opcode when parsing DSDT, resulting in lack of keyboard during boot (SeaBIOS console, grub, FreeDOS). While fix for SeaBIOS is posted https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/ fixed SeaBIOS might not make into QEMU-7.2 in time. Hence this workaround that puts PRQx back into _SB scope and gets rid of aliases in ISA bridge description, so DSDT will be parsable by broken SeaBIOS. That brings back hardcoded references to ISA bridge PCI0.S08.P40C/PCI0.SF8.PIRQ where middle part now is auto generated based on slot it's plugged in, but it should be fine as bridge initialization also hardcodes PCI address of the bridge so it can't ever move. Once QEMU tree has fixed SeaBIOS blob, we should be able to drop this part and revert back to alias based approach Reported-by: Volker RĂ¼melin <vr_qemu@t-online.de> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20221121153613.3972225-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/isa/lpc_ich9.c16
-rw-r--r--hw/isa/piix3.c12
2 files changed, 8 insertions, 20 deletions
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 0b0a83e080..6c44cc9767 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -813,12 +813,13 @@ static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
BusChild *kid;
ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
BusState *bus = BUS(s->isa_bus);
+ Aml *sb_scope = aml_scope("\\_SB");
/* ICH9 PCI to ISA irq remapping */
aml_append(scope, aml_operation_region("PIRQ", AML_PCI_CONFIG,
aml_int(0x60), 0x0C));
/* Fields declarion has to happen *after* operation region */
- field = aml_field("PIRQ", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
+ field = aml_field("PCI0.SF8.PIRQ", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("PRQA", 8));
aml_append(field, aml_named_field("PRQB", 8));
aml_append(field, aml_named_field("PRQC", 8));
@@ -828,17 +829,8 @@ static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
aml_append(field, aml_named_field("PRQF", 8));
aml_append(field, aml_named_field("PRQG", 8));
aml_append(field, aml_named_field("PRQH", 8));
- aml_append(scope, field);
-
- /* hack: put fields into _SB scope for LNKx to find them */
- aml_append(scope, aml_alias("PRQA", "\\_SB.PRQA"));
- aml_append(scope, aml_alias("PRQB", "\\_SB.PRQB"));
- aml_append(scope, aml_alias("PRQC", "\\_SB.PRQC"));
- aml_append(scope, aml_alias("PRQD", "\\_SB.PRQD"));
- aml_append(scope, aml_alias("PRQE", "\\_SB.PRQE"));
- aml_append(scope, aml_alias("PRQF", "\\_SB.PRQF"));
- aml_append(scope, aml_alias("PRQG", "\\_SB.PRQG"));
- aml_append(scope, aml_alias("PRQH", "\\_SB.PRQH"));
+ aml_append(sb_scope, field);
+ aml_append(scope, sb_scope);
QTAILQ_FOREACH(kid, &bus->children, sibling) {
call_dev_aml_func(DEVICE(kid->child), scope);
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index f9b4af5c05..eabad7ba58 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -318,24 +318,20 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
{
Aml *field;
BusChild *kid;
+ Aml *sb_scope = aml_scope("\\_SB");
BusState *bus = qdev_get_child_bus(DEVICE(adev), "isa.0");
/* PIIX PCI to ISA irq remapping */
aml_append(scope, aml_operation_region("P40C", AML_PCI_CONFIG,
aml_int(0x60), 0x04));
/* Fields declarion has to happen *after* operation region */
- field = aml_field("P40C", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
+ field = aml_field("PCI0.S08.P40C", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("PRQ0", 8));
aml_append(field, aml_named_field("PRQ1", 8));
aml_append(field, aml_named_field("PRQ2", 8));
aml_append(field, aml_named_field("PRQ3", 8));
- aml_append(scope, field);
-
- /* hack: put fields into _SB scope for LNKx to find them */
- aml_append(scope, aml_alias("PRQ0", "\\_SB.PRQ0"));
- aml_append(scope, aml_alias("PRQ1", "\\_SB.PRQ1"));
- aml_append(scope, aml_alias("PRQ2", "\\_SB.PRQ2"));
- aml_append(scope, aml_alias("PRQ3", "\\_SB.PRQ3"));
+ aml_append(sb_scope, field);
+ aml_append(scope, sb_scope);
QTAILQ_FOREACH(kid, &bus->children, sibling) {
call_dev_aml_func(DEVICE(kid->child), scope);