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| author | Ramon Fried | 2020-04-18 10:51:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-04-30 16:35:41 +0200 |
| commit | 59ab136a9e24f989cb7922d9cf7d1774fc497a78 (patch) | |
| tree | 5f629633bce0c5fb7875e0885e6add212fc0cbb1 | |
| parent | Cadence: gem: fix wraparound in 64bit descriptors (diff) | |
| download | qemu-59ab136a9e24f989cb7922d9cf7d1774fc497a78.tar.gz qemu-59ab136a9e24f989cb7922d9cf7d1774fc497a78.tar.xz qemu-59ab136a9e24f989cb7922d9cf7d1774fc497a78.zip | |
net: cadence_gem: clear RX control descriptor
The RX ring descriptors control field is used for setting
SOF and EOF (start of frame and end of frame).
The SOF and EOF weren't cleared from the previous descriptors,
causing inconsistencies in ring buffer.
Fix that by clearing the control field of every descriptors we're
processing.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200418085145.489726-1-rfried.dev@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/net/cadence_gem.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index b7b7985bf2..22a0b1b1f9 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -411,6 +411,11 @@ static inline void rx_desc_set_sof(uint32_t *desc) desc[1] |= DESC_1_RX_SOF; } +static inline void rx_desc_clear_control(uint32_t *desc) +{ + desc[1] = 0; +} + static inline void rx_desc_set_eof(uint32_t *desc) { desc[1] |= DESC_1_RX_EOF; @@ -999,6 +1004,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) rxbuf_ptr += MIN(bytes_to_copy, rxbufsize); bytes_to_copy -= MIN(bytes_to_copy, rxbufsize); + rx_desc_clear_control(s->rx_desc[q]); + /* Update the descriptor. */ if (first_desc) { rx_desc_set_sof(s->rx_desc[q]); |