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| author | Edgar E. Iglesias | 2018-10-24 08:50:20 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-10-24 08:51:37 +0200 |
| commit | 726a2a951bf12fe0e0c0034b3ba23e8a3e2f331c (patch) | |
| tree | 855a55008fa259560a0de1185076ae598baa8b79 | |
| parent | target/arm: Reorg NEON VLD/VST single element to one lane (diff) | |
| download | qemu-726a2a951bf12fe0e0c0034b3ba23e8a3e2f331c.tar.gz qemu-726a2a951bf12fe0e0c0034b3ba23e8a3e2f331c.tar.xz qemu-726a2a951bf12fe0e0c0034b3ba23e8a3e2f331c.zip | |
net: cadence_gem: Announce availability of priority queues
Announce the availability of the various priority queues.
This fixes an issue where guest kernels would miss to
configure secondary queues due to inproper feature bits.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20181017213932.19973-2-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/net/cadence_gem.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 1795998928..16a8455128 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1283,6 +1283,7 @@ static void gem_reset(DeviceState *d) int i; CadenceGEMState *s = CADENCE_GEM(d); const uint8_t *a; + uint32_t queues_mask = 0; DB_PRINT("\n"); @@ -1299,7 +1300,12 @@ static void gem_reset(DeviceState *d) s->regs[GEM_DESCONF] = 0x02500111; s->regs[GEM_DESCONF2] = 0x2ab13fff; s->regs[GEM_DESCONF5] = 0x002f2045; - s->regs[GEM_DESCONF6] = 0x00000200; + s->regs[GEM_DESCONF6] = 0x0; + + if (s->num_priority_queues > 1) { + queues_mask = MAKE_64BIT_MASK(1, s->num_priority_queues - 1); + s->regs[GEM_DESCONF6] |= queues_mask; + } /* Set MAC address */ a = &s->conf.macaddr.a[0]; |