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| author | Alex Bennée | 2017-02-28 15:35:14 +0100 |
|---|---|---|
| committer | Alex Bennée | 2017-03-09 11:38:02 +0100 |
| commit | 72c1701f62e8d44eb24a0583a958edc280105455 (patch) | |
| tree | 4c2cc14c3042f763926b3bdaec016cfba23c3666 | |
| parent | vl/cpus: be smarter with icount and MTTCG (diff) | |
| download | qemu-72c1701f62e8d44eb24a0583a958edc280105455.tar.gz qemu-72c1701f62e8d44eb24a0583a958edc280105455.tar.xz qemu-72c1701f62e8d44eb24a0583a958edc280105455.zip | |
target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO
This suppresses the incorrect warning when forcing MTTCG for x86
guests on x86 hosts. A future patch will still warn when
TARGET_SUPPORT_MTTCG hasn't been defined for the guest (which is still
pending for x86).
Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
| -rw-r--r-- | target/i386/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index ac2ad6d443..fb09aee7f8 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -30,6 +30,9 @@ #define TARGET_LONG_BITS 32 #endif +/* The x86 has a strong memory model with some store-after-load re-ordering */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + /* Maximum instruction code size */ #define TARGET_MAX_INSN_SIZE 16 |