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| author | David Hildenbrand | 2019-03-07 13:15:15 +0100 |
|---|---|---|
| committer | Cornelia Huck | 2019-03-11 09:31:01 +0100 |
| commit | 79c1620aeac0bddd0466c4baf217e77337319c9a (patch) | |
| tree | 169f4fe5c474992de31b3e69cf751e3e4f14f4ec | |
| parent | s390x/tcg: Implement VECTOR LOAD (diff) | |
| download | qemu-79c1620aeac0bddd0466c4baf217e77337319c9a.tar.gz qemu-79c1620aeac0bddd0466c4baf217e77337319c9a.tar.xz qemu-79c1620aeac0bddd0466c4baf217e77337319c9a.zip | |
s390x/tcg: Implement VECTOR LOAD AND REPLICATE
We can use tcg_gen_gvec_dup_i64() to carry out the duplication.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190307121539.12842-9-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| -rw-r--r-- | target/s390x/insn-data.def | 2 | ||||
| -rw-r--r-- | target/s390x/translate_vx.inc.c | 19 |
2 files changed, 21 insertions, 0 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index f129e51d41..7be8977989 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -984,6 +984,8 @@ /* VECTOR LOAD */ F(0xe706, VL, VRX, V, la2, 0, 0, 0, vl, 0, IF_VEC) F(0xe756, VLR, VRR_a, V, 0, 0, 0, 0, vlr, 0, IF_VEC) +/* VECTOR LOAD AND REPLICATE */ + F(0xe705, VLREP, VRX, V, la2, 0, 0, 0, vlrep, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index 9063784a76..ede4cc4f6d 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -113,6 +113,8 @@ static void write_vec_element_i64(TCGv_i64 src, int reg, uint8_t enr, } } +#define gen_gvec_dup_i64(es, v1, c) \ + tcg_gen_gvec_dup_i64(es, vec_full_reg_offset(v1), 16, 16, c) #define gen_gvec_mov(v1, v2) \ tcg_gen_gvec_mov(0, vec_full_reg_offset(v1), vec_full_reg_offset(v2), 16, \ 16) @@ -243,3 +245,20 @@ static DisasJumpType op_vlr(DisasContext *s, DisasOps *o) gen_gvec_mov(get_field(s->fields, v1), get_field(s->fields, v2)); return DISAS_NEXT; } + +static DisasJumpType op_vlrep(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s->fields, m3); + TCGv_i64 tmp; + + if (es > ES_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + tmp = tcg_temp_new_i64(); + tcg_gen_qemu_ld_i64(tmp, o->addr1, get_mem_index(s), MO_TE | es); + gen_gvec_dup_i64(es, get_field(s->fields, v1), tmp); + tcg_temp_free_i64(tmp); + return DISAS_NEXT; +} |