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| author | Philippe Mathieu-Daudé | 2020-12-06 23:45:09 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2021-01-14 17:13:53 +0100 |
| commit | 8b7322add375fb13d199079368bc84e4619478fa (patch) | |
| tree | d55a240ed0aea5602c9913ded962720c6b2524fb | |
| parent | target/mips: Extract FPU specific definitions to translate.h (diff) | |
| download | qemu-8b7322add375fb13d199079368bc84e4619478fa.tar.gz qemu-8b7322add375fb13d199079368bc84e4619478fa.tar.xz qemu-8b7322add375fb13d199079368bc84e4619478fa.zip | |
target/mips: Only build TCG code when CONFIG_TCG is set
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-20-f4bug@amsat.org>
| -rw-r--r-- | target/mips/meson.build | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/target/mips/meson.build b/target/mips/meson.build index 5a49951c6d..596eb1aeeb 100644 --- a/target/mips/meson.build +++ b/target/mips/meson.build @@ -1,9 +1,11 @@ mips_ss = ss.source_set() mips_ss.add(files( 'cpu.c', + 'gdbstub.c', +)) +mips_ss.add(when: 'CONFIG_TCG', if_true: files( 'dsp_helper.c', 'fpu_helper.c', - 'gdbstub.c', 'lmmi_helper.c', 'msa_helper.c', 'op_helper.c', @@ -15,11 +17,13 @@ mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c')) mips_softmmu_ss = ss.source_set() mips_softmmu_ss.add(files( 'addr.c', - 'cp0_helper.c', 'cp0_timer.c', 'machine.c', 'mips-semi.c', )) +mips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files( + 'cp0_helper.c', +)) target_arch += {'mips': mips_ss} target_softmmu_arch += {'mips': mips_softmmu_ss} |