diff options
| author | Alistair Francis | 2020-05-27 01:06:02 +0200 |
|---|---|---|
| committer | Alistair Francis | 2020-06-03 18:11:51 +0200 |
| commit | 8be6971b73da45e8ee9f8decd136ff054b5230ac (patch) | |
| tree | befdae38ead82ad7c111358d482acc637928fd53 | |
| parent | target/riscv: Don't overwrite the reset vector (diff) | |
| download | qemu-8be6971b73da45e8ee9f8decd136ff054b5230ac.tar.gz qemu-8be6971b73da45e8ee9f8decd136ff054b5230ac.tar.xz qemu-8be6971b73da45e8ee9f8decd136ff054b5230ac.zip | |
target/riscv: Disable the MMU correctly
Previously if we didn't enable the MMU it would be enabled in the
realize() function anyway. Let's ensure that if we don't want the MMU we
disable it. We also don't need to enable the MMU as it will be enabled
in realize() by default.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
| -rw-r--r-- | target/riscv/cpu.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 55a180edf9..e1c9a2de58 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -142,7 +142,6 @@ static void rv32gcsu_priv1_10_0_cpu_init(Object *obj) set_misa(env, RV32 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); set_priv_version(env, PRIV_VERSION_1_10_0); set_resetvec(env, DEFAULT_RSTVEC); - set_feature(env, RISCV_FEATURE_MMU); set_feature(env, RISCV_FEATURE_PMP); } @@ -153,6 +152,7 @@ static void rv32imacu_nommu_cpu_init(Object *obj) set_priv_version(env, PRIV_VERSION_1_10_0); set_resetvec(env, DEFAULT_RSTVEC); set_feature(env, RISCV_FEATURE_PMP); + qdev_prop_set_bit(DEVICE(obj), "mmu", false); } static void rv32imafcu_nommu_cpu_init(Object *obj) @@ -162,6 +162,7 @@ static void rv32imafcu_nommu_cpu_init(Object *obj) set_priv_version(env, PRIV_VERSION_1_10_0); set_resetvec(env, DEFAULT_RSTVEC); set_feature(env, RISCV_FEATURE_PMP); + qdev_prop_set_bit(DEVICE(obj), "mmu", false); } #elif defined(TARGET_RISCV64) @@ -180,7 +181,6 @@ static void rv64gcsu_priv1_10_0_cpu_init(Object *obj) set_misa(env, RV64 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); set_priv_version(env, PRIV_VERSION_1_10_0); set_resetvec(env, DEFAULT_RSTVEC); - set_feature(env, RISCV_FEATURE_MMU); set_feature(env, RISCV_FEATURE_PMP); } @@ -191,6 +191,7 @@ static void rv64imacu_nommu_cpu_init(Object *obj) set_priv_version(env, PRIV_VERSION_1_10_0); set_resetvec(env, DEFAULT_RSTVEC); set_feature(env, RISCV_FEATURE_PMP); + qdev_prop_set_bit(DEVICE(obj), "mmu", false); } #endif |