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| author | Richard Henderson | 2018-05-04 19:05:51 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-05-04 19:05:51 +0200 |
| commit | 8dae46970532afcf93470b00e83ca9921980efc3 (patch) | |
| tree | 62d5b8936fdb32625cc84eedcb63942ac41f5773 | |
| parent | arm: boot: set boot_info starting from first_cpu (diff) | |
| download | qemu-8dae46970532afcf93470b00e83ca9921980efc3.tar.gz qemu-8dae46970532afcf93470b00e83ca9921980efc3.tar.xz qemu-8dae46970532afcf93470b00e83ca9921980efc3.zip | |
target/arm: Tidy conditions in handle_vec_simd_shri
The (size > 3 && !is_q) condition is identical to the preceeding test
of bit 3 in immh; eliminate it. For the benefit of Coverity, assert
that size is within the bounds we expect.
Fixes: Coverity CID1385846
Fixes: Coverity CID1385849
Fixes: Coverity CID1385852
Fixes: Coverity CID1385857
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180501180455.11214-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/translate-a64.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index bff4e13bf6..97950dce1a 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -9019,11 +9019,7 @@ static void handle_vec_simd_shri(DisasContext *s, bool is_q, bool is_u, unallocated_encoding(s); return; } - - if (size > 3 && !is_q) { - unallocated_encoding(s); - return; - } + tcg_debug_assert(size <= 3); if (!fp_access_check(s)) { return; |