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author | Peter Maydell | 2018-03-01 12:05:58 +0100 |
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committer | Peter Maydell | 2018-03-01 12:13:59 +0100 |
commit | 969b389ee8ba84bc3f2e7ccfa993679fac410ad2 (patch) | |
tree | c58c321c45143bf589c11af0bf7022d7c707f9a5 | |
parent | arm/translate-a64: add all single op FP16 to handle_fp_1src_half (diff) | |
download | qemu-969b389ee8ba84bc3f2e7ccfa993679fac410ad2.tar.gz qemu-969b389ee8ba84bc3f2e7ccfa993679fac410ad2.tar.xz qemu-969b389ee8ba84bc3f2e7ccfa993679fac410ad2.zip |
target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPU
Now we have implemented FP16 we can enable it for the "any" CPU.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[PMM: split out from an earlier patch in the series]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target/arm/cpu64.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1c330adc28..9743bdc8c3 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -230,6 +230,7 @@ static void aarch64_any_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8_SM4); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); + set_feature(&cpu->env, ARM_FEATURE_V8_FP16); cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */ cpu->dcz_blocksize = 7; /* 512 bytes */ } |