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author | Richard Henderson | 2019-10-23 17:00:47 +0200 |
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committer | Peter Maydell | 2019-10-24 18:16:28 +0200 |
commit | 9b253fe5544672a48a4c22fb1535a7f581321871 (patch) | |
tree | fb2a4014876c4a54d776afe40b3c3758436131c6 | |
parent | target/arm: Split out arm_mmu_idx_el (diff) | |
download | qemu-9b253fe5544672a48a4c22fb1535a7f581321871.tar.gz qemu-9b253fe5544672a48a4c22fb1535a7f581321871.tar.xz qemu-9b253fe5544672a48a4c22fb1535a7f581321871.zip |
target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state
By performing this store early, we avoid having to save and restore
the register holding the address around any function calls.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191023150057.25731-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target/arm/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 3f7d3f257d..37424e3d4d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11225,6 +11225,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, { uint32_t flags, pstate_for_ss; + *cs_base = 0; flags = rebuild_hflags_internal(env); if (is_a64(env)) { @@ -11298,7 +11299,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } *pflags = flags; - *cs_base = 0; } #ifdef TARGET_AARCH64 |