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author | Philippe Mathieu-Daudé | 2021-01-31 19:44:44 +0100 |
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committer | Peter Maydell | 2021-02-03 11:15:50 +0100 |
commit | 9e39983e5daeedcf1d34a4d53dcf71b637886bf5 (patch) | |
tree | 76d6c8ac6fbf49a14231c3f32395f09267f303c9 | |
parent | hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register (diff) | |
download | qemu-9e39983e5daeedcf1d34a4d53dcf71b637886bf5.tar.gz qemu-9e39983e5daeedcf1d34a4d53dcf71b637886bf5.tar.xz qemu-9e39983e5daeedcf1d34a4d53dcf71b637886bf5.zip |
hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
The STM32F405 SoC uses an OR gate on its ADC IRQs.
Fixes: 529fc5fd3e1 ("hw/arm: Add the STM32F4xx SoC")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210131184449.382425-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | hw/arm/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 13cc42dcc8..a320a12485 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -336,6 +336,7 @@ config STM32F205_SOC config STM32F405_SOC bool select ARM_V7M + select OR_IRQ select STM32F4XX_SYSCFG select STM32F4XX_EXTI |