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| author | malc | 2008-07-24 19:37:09 +0200 |
|---|---|---|
| committer | malc | 2008-07-24 19:37:09 +0200 |
| commit | a69abbe0b3428a13c8225e1bd5ea3c938a9319af (patch) | |
| tree | e39419ab1da21350f9067fdfe35e433b3efdb3e1 | |
| parent | Sparc32: save/load all MMU registers, Sparc64: add CPU save/load (diff) | |
| download | qemu-a69abbe0b3428a13c8225e1bd5ea3c938a9319af.tar.gz qemu-a69abbe0b3428a13c8225e1bd5ea3c938a9319af.tar.xz qemu-a69abbe0b3428a13c8225e1bd5ea3c938a9319af.zip | |
Emit and use adhoc function descriptor for code_gen_prologue on PPC64
Thus avoiding fragile inline assembly hackery to call into generated
code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | tcg/ppc64/tcg-target.c | 11 | ||||
| -rw-r--r-- | tcg/tcg.h | 17 |
2 files changed, 10 insertions, 18 deletions
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 03a5d3275c..a4b339efe9 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -773,6 +773,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc) void tcg_target_qemu_prologue (TCGContext *s) { int i, frame_size; + uint64_t addr; frame_size = 0 + 8 /* back chain */ @@ -786,6 +787,12 @@ void tcg_target_qemu_prologue (TCGContext *s) ; frame_size = (frame_size + 15) & ~15; + /* First emit adhoc function descriptor */ + addr = (uint64_t) s->code_ptr + 24; + tcg_out32 (s, addr >> 32); tcg_out32 (s, addr); /* entry point */ + s->code_ptr += 16; /* skip TOC and environment pointer */ + + /* Prologue */ tcg_out32 (s, MFSPR | RT (0) | LR); tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff)); for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i) @@ -796,10 +803,11 @@ void tcg_target_qemu_prologue (TCGContext *s) ) ); tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20)); - tcg_out32 (s, STD | RS (2) | RA (1) | (frame_size + 40)); tcg_out32 (s, MTSPR | RS (3) | CTR); tcg_out32 (s, BCCTR | BO_ALWAYS); + + /* Epilogue */ tb_ret_addr = s->code_ptr; for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i) @@ -810,7 +818,6 @@ void tcg_target_qemu_prologue (TCGContext *s) ) ); tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20)); - tcg_out32 (s, LD | RT (2) | RA (1) | (frame_size + 40)); tcg_out32 (s, MTSPR | RS (0) | LR); tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); tcg_out32 (s, BCLR | BO_ALWAYS); @@ -413,24 +413,9 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2); uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2); extern uint8_t code_gen_prologue[]; -#ifdef __powerpc__ -#ifdef __powerpc64__ -#define tcg_qemu_tb_exec(tb_ptr) \ - ({ unsigned long p; \ - asm volatile ( \ - "mtctr %1\n\t" \ - "mr 3,%2\n\t" \ - "bctrl\n\t" \ - "mr %0,3\n\t" \ - : "=r" (p) \ - : "r" (code_gen_prologue), "r" (tb_ptr) \ - : "3", "4", "5", "6", "7", "8", "9", "10", "11", "12"); \ - p; \ - }) -#else +#if defined(__powerpc__) && !defined(__powerpc64__) #define tcg_qemu_tb_exec(tb_ptr) \ ((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr) -#endif #else #define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr) #endif |