summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDavid Gibson2017-03-01 06:23:12 +0100
committerDavid Gibson2017-03-03 01:30:59 +0100
commitbb998645284924db6da93e777af5f29ef2f3c0a8 (patch)
tree466de4a0ec4356e64014c407f686efada7e91ca7
parenttarget/ppc: Rework hash mmu page fault code and add defines for clarity (diff)
downloadqemu-bb998645284924db6da93e777af5f29ef2f3c0a8.tar.gz
qemu-bb998645284924db6da93e777af5f29ef2f3c0a8.tar.xz
qemu-bb998645284924db6da93e777af5f29ef2f3c0a8.zip
spapr_pci: Advertise access to PCIe extended config space
The (paravirtual) PCI host bridge on the 'pseries' machine in most regards acts like a regular PCI bus, rather than a PCIe bus. Despite this, though, it does allow access to the PCIe extended config space. We already implemented the RTAS methods to allow this access.. but forgot to put the markers into the device tree so that guest's know it is there. This adds them in. With this, a pseries guest is able to view extended config space on (for example an e1000e device. This should be enough to allow guests to use at least some PCIe devices. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r--hw/ppc/spapr_pci.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 2a3499eaf8..919d3c2c59 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1321,6 +1321,10 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
_FDT(fdt_setprop(fdt, offset, "assigned-addresses",
(uint8_t *)rp.assigned, rp.assigned_len));
+ if (pci_is_express(dev)) {
+ _FDT(fdt_setprop_cell(fdt, offset, "ibm,pci-config-space-type", 0x1));
+ }
+
return 0;
}