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| author | Prasad J Pandit | 2016-10-12 14:37:41 +0200 |
|---|---|---|
| committer | Yongbok Kim | 2017-03-20 12:19:55 +0100 |
| commit | c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c (patch) | |
| tree | 353de1e031db28de89471cc3bd3470e6dec83673 | |
| parent | target/mips: fix delay slot detection in gen_msa_branch() (diff) | |
| download | qemu-c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c.tar.gz qemu-c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c.tar.xz qemu-c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c.zip | |
dma: rc4030: limit interval timer reload value
The JAZZ RC4030 chipset emulator has a periodic timer and
associated interval reload register. The reload value is used
as divider when computing timer's next tick value. If reload
value is large, it could lead to divide by zero error. Limit
the interval reload value to avoid it.
Reported-by: Huawei PSIRT <psirt@huawei.com>
Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
Tested-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
| -rw-r--r-- | hw/dma/rc4030.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 17c8518fea..41fc043464 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -460,7 +460,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data, break; /* Interval timer reload */ case 0x0228: - s->itr = val; + s->itr = val & 0x01FF; qemu_irq_lower(s->timer_irq); set_next_tick(s); break; |