diff options
| author | James Hogan | 2015-10-02 14:24:12 +0200 |
|---|---|---|
| committer | Richard Henderson | 2015-10-19 23:04:38 +0200 |
| commit | c0e40dbdcc291c85faa289a53be60b7b1b7c7598 (patch) | |
| tree | e342b9fff4f1c6be0c52110a8adb0873d7724c5c | |
| parent | tcg/ppc: Prefer mask over andi. (diff) | |
| download | qemu-c0e40dbdcc291c85faa289a53be60b7b1b7c7598.tar.gz qemu-c0e40dbdcc291c85faa289a53be60b7b1b7c7598.tar.xz qemu-c0e40dbdcc291c85faa289a53be60b7b1b7c7598.zip | |
tcg-opc.h: Simplify insn_start def
We already have a TLADDR_ARGS definition, so rearrange the order
slightly and use it in the definition of insn_start, instead of
having an #ifdef.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1443788657-14537-2-git-send-email-james.hogan@imgtec.com>
| -rw-r--r-- | tcg/tcg-opc.h | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index c6f95703eb..6d0410c4b9 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -173,18 +173,15 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64)) DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) +#define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) +#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) + /* QEMU specific */ -#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS -DEF(insn_start, 0, 0, 2 * TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT) -#else -DEF(insn_start, 0, 0, TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT) -#endif +DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS, + TCG_OPF_NOT_PRESENT) DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END) DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END) -#define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) -#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) - DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) DEF(qemu_st_i32, 0, TLADDR_ARGS + 1, 1, |