diff options
| author | Nikunj A Dadhania | 2017-01-10 09:50:41 +0100 |
|---|---|---|
| committer | David Gibson | 2017-01-31 00:10:14 +0100 |
| commit | c5969d2eb17103d6c38c2d244d33ed2404210cd9 (patch) | |
| tree | 871d5c46df0dff1831b13a19a4caf4c1905aa3a1 | |
| parent | target-ppc: Add xvxexpdp instruction (diff) | |
| download | qemu-c5969d2eb17103d6c38c2d244d33ed2404210cd9.tar.gz qemu-c5969d2eb17103d6c38c2d244d33ed2404210cd9.tar.xz qemu-c5969d2eb17103d6c38c2d244d33ed2404210cd9.zip | |
target-ppc: Add xvxsigsp instruction
xvxsigsp: VSX Vector Extract Significand Single Precision
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target/ppc/fpu_helper.c | 20 | ||||
| -rw-r--r-- | target/ppc/helper.h | 1 | ||||
| -rw-r--r-- | target/ppc/translate/vsx-impl.inc.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate/vsx-ops.inc.c | 1 |
4 files changed, 24 insertions, 0 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 77f68e9dcd..4da83d9272 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3026,3 +3026,23 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_XXPERM(xxperm, 0) VSX_XXPERM(xxpermr, 1) + +void helper_xvxsigsp(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xt, xb; + uint32_t exp, i, fraction; + + getVSR(xB(opcode), &xb, env); + memset(&xt, 0, sizeof(xt)); + + for (i = 0; i < 4; i++) { + exp = (xb.VsrW(i) >> 23) & 0xFF; + fraction = xb.VsrW(i) & 0x7FFFFF; + if (exp != 0 && exp != 255) { + xt.VsrW(i) = fraction | 0x00800000; + } else { + xt.VsrW(i) = fraction; + } + } + putVSR(xT(opcode), &xt, env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 3cac050134..ae14da4ba6 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -545,6 +545,7 @@ DEF_HELPER_2(xxperm, void, env, i32) DEF_HELPER_2(xxpermr, void, env, i32) DEF_HELPER_4(xxextractuw, void, env, tl, tl, i32) DEF_HELPER_4(xxinsertw, void, env, tl, tl, i32) +DEF_HELPER_2(xvxsigsp, void, env, i32) DEF_HELPER_2(efscfsi, i32, env, i32) DEF_HELPER_2(efscfui, i32, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 7b26f75db8..4e57af7726 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1430,6 +1430,8 @@ static void gen_xvxexpdp(DisasContext *ctx) tcg_gen_andi_i64(xtl, xtl, 0x7FF); } +GEN_VSX_HELPER_2(xvxsigsp, 0x00, 0x04, 0, PPC2_ISA300) + #undef GEN_XX2FORM #undef GEN_XX3FORM #undef GEN_XX2IFORM diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-ops.inc.c index a3061cee60..2c4f641ab4 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -128,6 +128,7 @@ GEN_XX3FORM(xviexpsp, 0x00, 0x1B, PPC2_ISA300), GEN_XX3FORM(xviexpdp, 0x00, 0x1F, PPC2_ISA300), GEN_XX2FORM_EO(xvxexpdp, 0x16, 0x1D, 0x00, PPC2_ISA300), GEN_XX2FORM_EO(xvxexpsp, 0x16, 0x1D, 0x08, PPC2_ISA300), +GEN_XX2FORM_EO(xvxsigsp, 0x16, 0x1D, 0x09, PPC2_ISA300), GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX), GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX), |