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| author | Michael S. Tsirkin | 2012-03-04 14:35:29 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin | 2012-03-15 23:41:39 +0100 |
| commit | cd7898f714773f7a317b122eaa45e701fd4f9849 (patch) | |
| tree | 247362e9b9d9f10508fbed67a4cb79fd04356ac9 | |
| parent | pci: fix bridge IO/BASE (diff) | |
| download | qemu-cd7898f714773f7a317b122eaa45e701fd4f9849.tar.gz qemu-cd7898f714773f7a317b122eaa45e701fd4f9849.tar.xz qemu-cd7898f714773f7a317b122eaa45e701fd4f9849.zip | |
pci_bridge: upper 32 bit are long registers
Use pci_set_long for accesses.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| -rw-r--r-- | hw/pci_bridge.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c index eeee8a6ad0..866f0b6c52 100644 --- a/hw/pci_bridge.c +++ b/hw/pci_bridge.c @@ -249,8 +249,8 @@ void pci_bridge_disable_base_limit(PCIDevice *dev) PCI_PREF_RANGE_MASK & 0xffff); pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_LIMIT, PCI_PREF_RANGE_MASK & 0xffff); - pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0); - pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0); + pci_set_long(conf + PCI_PREF_BASE_UPPER32, 0); + pci_set_long(conf + PCI_PREF_LIMIT_UPPER32, 0); } /* reset bridge specific configuration registers */ @@ -285,8 +285,8 @@ void pci_bridge_reset_reg(PCIDevice *dev) PCI_PREF_RANGE_MASK & 0xffff); pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_LIMIT, PCI_PREF_RANGE_MASK & 0xffff); - pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0); - pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0); + pci_set_long(conf + PCI_PREF_BASE_UPPER32, 0); + pci_set_long(conf + PCI_PREF_LIMIT_UPPER32, 0); pci_set_word(conf + PCI_BRIDGE_CONTROL, 0); } |