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authorRichard Henderson2022-03-01 22:59:53 +0100
committerPeter Maydell2022-03-02 20:27:37 +0100
commitd976de218c534735e307fc4a6c03e3ae764fd419 (patch)
tree3ed5f6ff0ad3f2d77c69160d5743bfd57cfd64ff
parenttarget/arm: Introduce tlbi_aa64_get_range (diff)
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target/arm: Fix TLBIRange.base for 16k and 64k pages
The shift of the BaseADDR field depends on the translation granule in use. Fixes: 84940ed8255 ("target/arm: Add support for FEAT_TLBIRANGE") Reported-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220301215958.157011-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/helper.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 31c2a716f2..e455397fb5 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4538,10 +4538,11 @@ static TLBIRange tlbi_aa64_get_range(CPUARMState *env, ARMMMUIdx mmuidx,
ret.length = (num + 1) << (exponent + page_shift);
if (regime_has_2_ranges(mmuidx)) {
- ret.base = sextract64(value, 0, 37) << TARGET_PAGE_BITS;
+ ret.base = sextract64(value, 0, 37);
} else {
- ret.base = extract64(value, 0, 37) << TARGET_PAGE_BITS;
+ ret.base = extract64(value, 0, 37);
}
+ ret.base <<= page_shift;
return ret;
}