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author | Richard Henderson | 2014-03-18 22:23:52 +0100 |
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committer | Richard Henderson | 2014-04-19 01:57:36 +0200 |
commit | d998e555d2a504d719b773b3164101aa36284a20 (patch) | |
tree | 81bf604585594ca612b4ee129c146902e315bc3d | |
parent | tci: Mask shift counts to avoid undefined behavior (diff) | |
download | qemu-d998e555d2a504d719b773b3164101aa36284a20.tar.gz qemu-d998e555d2a504d719b773b3164101aa36284a20.tar.xz qemu-d998e555d2a504d719b773b3164101aa36284a20.zip |
tcg: Fix out of range shift in deposit optimizations
By inspection, for a deposit(x, y, 0, 64), we'd have a shift of (1<<64)
and everything else falls apart. But we can reuse the existing deposit
logic to get this right.
Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r-- | tcg/optimize.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/tcg/optimize.c b/tcg/optimize.c index 2fb708ed40..c447062ab1 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -843,9 +843,8 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, break; CASE_OP_32_64(deposit): - tmp = ((1ull << args[4]) - 1); - mask = ((temps[args[1]].mask & ~(tmp << args[3])) - | ((temps[args[2]].mask & tmp) << args[3])); + mask = deposit64(temps[args[1]].mask, args[3], args[4], + temps[args[2]].mask); break; CASE_OP_32_64(or): @@ -1060,9 +1059,8 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[2]].state == TCG_TEMP_CONST) { s->gen_opc_buf[op_index] = op_to_movi(op); - tmp = ((1ull << args[4]) - 1); - tmp = (temps[args[1]].val & ~(tmp << args[3])) - | ((temps[args[2]].val & tmp) << args[3]); + tmp = deposit64(temps[args[1]].val, args[3], args[4], + temps[args[2]].val); tcg_opt_gen_movi(gen_args, args[0], tmp); gen_args += 2; args += 5; |