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| author | Alexandre Courbot | 2011-01-26 03:57:53 +0100 |
|---|---|---|
| committer | Aurelien Jarno | 2011-01-26 14:30:24 +0100 |
| commit | e3f114f761fd44db3b33f5d704da48392fce4ce8 (patch) | |
| tree | dfe023ae1a7c56796831efd170c454a76e9df8e7 | |
| parent | sh4: implement missing mmaped TLB read functions (diff) | |
| download | qemu-e3f114f761fd44db3b33f5d704da48392fce4ce8.tar.gz qemu-e3f114f761fd44db3b33f5d704da48392fce4ce8.tar.xz qemu-e3f114f761fd44db3b33f5d704da48392fce4ce8.zip | |
target-sh4: update PTEH upon MMU exception
Update the PTEH register to contain the VPN at which an MMU
exception occured as specified by the SH4 reference.
Signed-off-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-sh4/helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 785e9e54e7..d2038bd842 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -453,6 +453,10 @@ int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw, if (ret != MMU_OK) { env->tea = address; + if (ret != MMU_DTLB_MULTIPLE && ret != MMU_ITLB_MULTIPLE) { + env->pteh = (env->pteh & PTEH_ASID_MASK) | + (address & PTEH_VPN_MASK); + } switch (ret) { case MMU_ITLB_MISS: case MMU_DTLB_MISS_READ: |