diff options
| author | Peter Maydell | 2020-04-22 14:45:01 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-04-22 17:18:31 +0200 |
| commit | e73c4443473107ddf11ad3a7fea5bef2001ee802 (patch) | |
| tree | 769a48870f0ed91dde9c8e1db5148853ca42780c | |
| parent | slirp: update to fix CVE-2020-1983 (diff) | |
| download | qemu-e73c4443473107ddf11ad3a7fea5bef2001ee802.tar.gz qemu-e73c4443473107ddf11ad3a7fea5bef2001ee802.tar.xz qemu-e73c4443473107ddf11ad3a7fea5bef2001ee802.zip | |
target/arm: Fix ID_MMFR4 value on AArch64 'max' CPU
In commit 41a4bf1feab098da4cd the added code to set the CNP
field in ID_MMFR4 for the AArch64 'max' CPU had a typo
where it used the wrong variable name, resulting in ID_MMFR4
fields AC2, XNX and LSM being wrong. Fix the typo.
Fixes: 41a4bf1feab098da4cd
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20200422124501.28015-1-peter.maydell@linaro.org
| -rw-r--r-- | target/arm/cpu64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 62d36f9e8d..95d0c8c101 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -705,7 +705,7 @@ static void aarch64_max_initfn(Object *obj) u = cpu->isar.id_mmfr4; u = FIELD_DP32(u, ID_MMFR4, HPDS, 1); /* AA32HPD */ u = FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */ - u = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */ + u = FIELD_DP32(u, ID_MMFR4, CNP, 1); /* TTCNP */ cpu->isar.id_mmfr4 = u; u = cpu->isar.id_aa64dfr0; |