diff options
| author | Laurent Vivier | 2016-01-16 23:32:31 +0100 |
|---|---|---|
| committer | Laurent Vivier | 2016-10-28 10:38:48 +0200 |
| commit | eec37aec85af9f5fd59b534d20c86a775b8e7973 (patch) | |
| tree | d45086a65e0b32e27b331fc929437e2a62533ebd | |
| parent | target-m68k: add addressing modes to not (diff) | |
| download | qemu-eec37aec85af9f5fd59b534d20c86a775b8e7973.tar.gz qemu-eec37aec85af9f5fd59b534d20c86a775b8e7973.tar.xz qemu-eec37aec85af9f5fd59b534d20c86a775b8e7973.zip | |
target-m68k: eor can manage word and byte operands
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target-m68k/translate.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 031f7eb465..9734d05ecd 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -2131,16 +2131,17 @@ DISAS_INSN(cmpa) DISAS_INSN(eor) { TCGv src; - TCGv reg; TCGv dest; TCGv addr; + int opsize; - SRC_EA(env, src, OS_LONG, 0, &addr); - reg = DREG(insn, 9); + opsize = insn_opsize(insn); + + SRC_EA(env, src, opsize, 0, &addr); dest = tcg_temp_new(); - tcg_gen_xor_i32(dest, src, reg); - gen_logic_cc(s, dest, OS_LONG); - DEST_EA(env, insn, OS_LONG, dest, &addr); + tcg_gen_xor_i32(dest, src, DREG(insn, 9)); + gen_logic_cc(s, dest, opsize); + DEST_EA(env, insn, opsize, dest, &addr); } static void do_exg(TCGv reg1, TCGv reg2) |