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| author | Philippe Mathieu-Daudé | 2020-12-06 23:20:27 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2021-01-14 17:13:53 +0100 |
| commit | f9bd3d79f4f636ea9c9ce6dd2b6ad71b776458d6 (patch) | |
| tree | 168e00d38662f91c78b6ed75a2a1f8c3a403e252 | |
| parent | target/mips: Extract FPU helpers to 'fpu_helper.h' (diff) | |
| download | qemu-f9bd3d79f4f636ea9c9ce6dd2b6ad71b776458d6.tar.gz qemu-f9bd3d79f4f636ea9c9ce6dd2b6ad71b776458d6.tar.xz qemu-f9bd3d79f4f636ea9c9ce6dd2b6ad71b776458d6.zip | |
target/mips: Add !CONFIG_USER_ONLY comment after #endif
To help understand ifdef'ry, add comment after #endif.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201214183739.500368-4-f4bug@amsat.org>
| -rw-r--r-- | target/mips/helper.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/target/mips/helper.c b/target/mips/helper.c index d1b6bb6fb2..92bd3fb855 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -455,7 +455,8 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val) } } } -#endif + +#endif /* !CONFIG_USER_ONLY */ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address, int rw, int tlb_error) @@ -537,6 +538,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address, } #if !defined(CONFIG_USER_ONLY) + hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { MIPSCPU *cpu = MIPS_CPU(cs); @@ -550,7 +552,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) } return phys_addr; } -#endif +#endif /* !CONFIG_USER_ONLY */ #if !defined(CONFIG_USER_ONLY) #if !defined(TARGET_MIPS64) @@ -886,7 +888,7 @@ refill: return true; } #endif -#endif +#endif /* !CONFIG_USER_ONLY */ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, @@ -1088,7 +1090,8 @@ static inline void set_badinstr_registers(CPUMIPSState *env) env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4); } } -#endif + +#endif /* !CONFIG_USER_ONLY */ void mips_cpu_do_interrupt(CPUState *cs) { @@ -1482,7 +1485,7 @@ void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra) } } } -#endif +#endif /* !CONFIG_USER_ONLY */ void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env, uint32_t exception, |