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authorPeter A. G. Crosthwaite2012-03-05 05:39:13 +0100
committerEdgar E. Iglesias2012-03-07 02:20:19 +0100
commite32605062cd62c2a958ad28a6ad7de4eeab12027 (patch)
tree4b6b2d984fa6082a0c29333edd3080f2f11aa534 /MAINTAINERS
parentcadence_gem: initial version of device model (diff)
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xilinx_zynq: machine model initial version
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific system level control register (SLCR) module. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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diff --git a/MAINTAINERS b/MAINTAINERS
index 0b3b3d8dc6..d249947d12 100644
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@@ -251,6 +251,13 @@ M: Peter Maydell <peter.maydell@linaro.org>
S: Maintained
F: hw/versatilepb.c
+Xilinx Zynq
+M: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
+S: Maintained
+F: hw/xilinx_zynq.c
+F: hw/zynq_slcr.c
+F: hw/cadence_*
+
CRIS Machines
-------------
Axis Dev88