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authorPeter Maydell2019-01-29 12:46:04 +0100
committerPeter Maydell2019-01-29 12:46:04 +0100
commitf454a54f3bf95920d236ad893344141085db061a (patch)
tree041a9d9d82141804b74a61088960dfc37452a640 /MAINTAINERS
parentexec.c: Use correct attrs in cpu_memory_rw_debug() (diff)
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accel/tcg/user-exec: Don't parse aarch64 insns to test for read vs write
In cpu_signal_handler() for aarch64 hosts, currently we parse the faulting instruction to see if it is a load or a store. Since the 3.16 kernel (~2014), the kernel has provided us with the syndrome register for a fault, which includes the WnR bit. Use this instead if it is present, only falling back to instruction parsing if not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190108180014.32386-1-peter.maydell@linaro.org
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