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| author | Bin Meng | 2020-10-28 06:30:03 +0100 |
|---|---|---|
| committer | Alistair Francis | 2020-11-03 16:17:23 +0100 |
| commit | 933f73f13e5ceb9357e9c9d51ce39c43aa1d534f (patch) | |
| tree | 1276d3fe98992197dd292cca037981e77fe6c78a /VERSION | |
| parent | hw/misc: Add Microchip PolarFire SoC DDR Memory Controller support (diff) | |
| download | qemu-933f73f13e5ceb9357e9c9d51ce39c43aa1d534f.tar.gz qemu-933f73f13e5ceb9357e9c9d51ce39c43aa1d534f.tar.xz qemu-933f73f13e5ceb9357e9c9d51ce39c43aa1d534f.zip | |
hw/riscv: microchip_pfsoc: Connect DDR memory controller modules
Connect DDR SGMII PHY module and CFG module to the PolarFire SoC.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'VERSION')
0 files changed, 0 insertions, 0 deletions