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| author | Richard Henderson | 2021-07-16 23:20:49 +0200 |
|---|---|---|
| committer | Richard Henderson | 2021-07-21 19:45:38 +0200 |
| commit | be9568b4e02100681af14ab2d17522c3d497f511 (patch) | |
| tree | 139ea7e6fc042a405e980347cb502b7f9b341498 /accel/tcg/cputlb.c | |
| parent | qemu/atomic: Add aligned_{int64,uint64}_t types (diff) | |
| download | qemu-be9568b4e02100681af14ab2d17522c3d497f511.tar.gz qemu-be9568b4e02100681af14ab2d17522c3d497f511.tar.xz qemu-be9568b4e02100681af14ab2d17522c3d497f511.zip | |
tcg: Rename helper_atomic_*_mmu and provide for user-only
Always provide the atomic interface using TCGMemOpIdx oi
and uintptr_t retaddr. Rename from helper_* to cpu_* so
as to (mostly) match the exec/cpu_ldst.h functions, and
to emphasize that they are not callable from TCG directly.
Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/cputlb.c')
| -rw-r--r-- | accel/tcg/cputlb.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b4e15b6aad..63da1cc96f 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2686,12 +2686,14 @@ void cpu_stq_le_data(CPUArchState *env, target_ulong ptr, uint64_t val) cpu_stq_le_data_ra(env, ptr, val, 0); } -/* First set of helpers allows passing in of OI and RETADDR. This makes - them callable from other helpers. */ +/* + * First set of functions passes in OI and RETADDR. + * This makes them callable from other helpers. + */ #define EXTRA_ARGS , TCGMemOpIdx oi, uintptr_t retaddr #define ATOMIC_NAME(X) \ - HELPER(glue(glue(glue(atomic_ ## X, SUFFIX), END), _mmu)) + glue(glue(glue(cpu_atomic_ ## X, SUFFIX), END), _mmu) #define ATOMIC_MMU_DECLS #define ATOMIC_MMU_LOOKUP_RW \ atomic_mmu_lookup(env, addr, oi, DATA_SIZE, PAGE_READ | PAGE_WRITE, retaddr) |