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| author | Richard Henderson | 2022-08-19 23:24:34 +0200 |
|---|---|---|
| committer | Richard Henderson | 2022-10-04 05:53:30 +0200 |
| commit | 37523ff734721a699d338f918e95b1697cb0880c (patch) | |
| tree | cb3674a59eb684fdf2a3819cfb7388bd597f9f78 /accel | |
| parent | accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull (diff) | |
| download | qemu-37523ff734721a699d338f918e95b1697cb0880c.tar.gz qemu-37523ff734721a699d338f918e95b1697cb0880c.tar.xz qemu-37523ff734721a699d338f918e95b1697cb0880c.zip | |
accel/tcg: Drop addr member from SavedIOTLB
This field is only written, not read; remove it.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
| -rw-r--r-- | accel/tcg/cputlb.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index aa22f578cb..d06ff44ce9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1372,12 +1372,11 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBEntryFull *full, * This is read by tlb_plugin_lookup if the fulltlb entry doesn't match * because of the side effect of io_writex changing memory layout. */ -static void save_iotlb_data(CPUState *cs, hwaddr addr, - MemoryRegionSection *section, hwaddr mr_offset) +static void save_iotlb_data(CPUState *cs, MemoryRegionSection *section, + hwaddr mr_offset) { #ifdef CONFIG_PLUGIN SavedIOTLB *saved = &cs->saved_iotlb; - saved->addr = addr; saved->section = section; saved->mr_offset = mr_offset; #endif @@ -1406,7 +1405,7 @@ static void io_writex(CPUArchState *env, CPUTLBEntryFull *full, * The memory_region_dispatch may trigger a flush/resize * so for plugins we save the iotlb_data just in case. */ - save_iotlb_data(cpu, full->xlat_section, section, mr_offset); + save_iotlb_data(cpu, section, mr_offset); if (!qemu_mutex_iothread_locked()) { qemu_mutex_lock_iothread(); |