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author | Rémi Denis-Courmont | 2021-01-12 11:45:08 +0100 |
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committer | Peter Maydell | 2021-01-19 15:38:52 +0100 |
commit | 6b340aeb48e4f7f983e1c38790de65ae93079840 (patch) | |
tree | aaef4dde1f7e96dddf63b65a4c8f64080b2dbd9b /block/iscsi-opts.c | |
parent | target/arm: set HPFAR_EL2.NS on secure stage 2 faults (diff) | |
download | qemu-6b340aeb48e4f7f983e1c38790de65ae93079840.tar.gz qemu-6b340aeb48e4f7f983e1c38790de65ae93079840.tar.xz qemu-6b340aeb48e4f7f983e1c38790de65ae93079840.zip |
target/arm: revector to run-time pick target EL
On ARMv8-A, accesses by 32-bit secure EL1 to monitor registers trap to
the upper (64-bit) EL. With Secure EL2 support, we can no longer assume
that that is always EL3, so make room for the value to be computed at
run-time.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210112104511.36576-16-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'block/iscsi-opts.c')
0 files changed, 0 insertions, 0 deletions